Device for preventing current-leakage
View Patent ↗A device for preventing current-leakage is located between a transistor and a capacitor of a memory cell. The two terminals of the device for preventing current-leakage are respectively connected with a slave terminal of the transistor and an electric pole of the capacitor. The device for preventing current-leakage has at least two p-n junctions. The device for preventing current-leakage is a lateral silicon controlled rectifier, a diode for alternating current, or a silicon controlled rectifier. By utilizing the driving characteristic of the device for preventing current-leakage, electric charge stored in the capacitor hardly passes through the device for preventing current-leakage when the transistor is turned off to improve the current-leakage problem.
1. A device for preventing current-leakage, located between a transistor and a capacitor of a memory cell, wherein the device for preventing current-leakage is a lateral silicon controlled rectifier and two terminals of the lateral silicon controlled rectifier are respectively connected with a slave terminal of the transistor and an electric pole of the capacitor, comprising:
a first structure having a first P-typed region and a first N-typed region, wherein the first P-typed region and the first N-typed region are connected with the slave terminal of the transistor;
a first conducting layer connected with the slave terminal of the transistor, wherein the first structure is stacked on the first conducting layer, the first P-typed region and the first N-typed region contact the first conducting layer;
a second structure stacked on the first structure, wherein the second structure has a second P-typed region and a second N-typed region, the second N-typed region contacts the first P-typed region, there is a gap between the second P-typed region and the first P-typed region, and the second P-typed region and the second N-typed region are connected with the electric pole of the capacitor; and
a second conducting layer stacked on the second structure and contacting the second P-typed region and the second N-typed region, wherein the second conducting layer is connected with the electric pole of the capacitor.
2. The device for preventing current-leakage as claimed in claim 1 , wherein the capacitor is a stacked capacitor.
3. The device for preventing current-leakage as claimed in claim 1 , wherein the first conducting layer and the second conducting layer are made of Ti.
4. The device for preventing current-leakage as claimed in claim 1 , wherein the salve terminal of the transistor is a source or a drain.
5. The device for preventing current-leakage as claimed in claim 1 , wherein the first structure and the second structure are made of poly silicon.
6. A device for preventing current-leakage, located between a transistor and a capacitor of a memory cell, wherein the device for preventing current-leakage is a silicon controlled rectifier and two terminals of the silicon controlled rectifier are respectively connected with a slave terminal of the transistor and an electric pole of the capacitor, comprising:
a first structure having a first P-typed region and a first N-typed region, wherein the first N-typed region is connected with the slave terminal of the transistor, and the first P-typed region contacts the first N-typed region;
a first conducting layer connected with the slave terminal of the transistor, wherein the first structure is stacked on the first conducting layer, the first N-typed region contacts the first conducting layer, and there is a gap between the first P-typed region and the first conducting layer;
a second structure stacked on the first structure, wherein the second structure has a second P-typed region and a second N-typed region, the second N-typed region contacts the first P-typed region, the second P-typed region contacts the second N-typed region, there is a gap between the second P-typed region and the first P-typed region, and the second P-typed region is connected with the electric pole of the capacitor; and
a second conducting layer stacked on the second structure and contacting the second P-typed region, wherein the second conducting layer is connected with the electric pole of the capacitor.
7. The device for preventing current-leakage as claimed in claim 6 , wherein the capacitor is a stacked capacitor.
8. The device for preventing current-leakage as claimed in claim 6 , wherein the first conducting layer and the second conducting layer are made of Ti.
9. The device for preventing current-leakage as claimed in claim 6 , wherein the salve terminal of the transistor is a source or a drain.
10. The device for preventing current-leakage as claimed in claim 6 , wherein the first structure and the second structure are made of poly silicon.