Integrated circuit packaging system with encapsulation and underfill and method of manufacture thereof
View Patent ↗A method of manufacture of an integrated circuit packaging system includes: providing a package carrier having a dispense port; attaching an integrated circuit to the package carrier and over the dispense port; placing a mold chase over the integrated circuit and on the package carrier, the mold chase having a hole; and forming an encapsulation through the dispense port or the hole, the encapsulation surrounding the integrated circuit including completely filled in a space between the integrated circuit and the package carrier, and in a portion of the hole, the encapsulation having an elevated portion or a removal surface resulting from the elevated portion detached.
1. A method of manufacture of an integrated circuit packaging system comprising:
providing a package carrier having a dispense port;
attaching an integrated circuit to the package carrier and over the dispense port;
placing a mold chase over the integrated circuit and on the package carrier, the mold chase having a hole;
forming an encapsulation through the dispense port or the hole, the encapsulation surrounding the integrated circuit including completely filled in a space between the integrated circuit and the package carrier, and in a portion of the hole, the encapsulation having an elevated portion or a removal surface resulting from the elevated portion detached; and
wherein:
forming the encapsulation includes injecting the encapsulation through the dispense port, the encapsulation having a cavity partially exposing the integrated circuit.
2. The method as claimed in claim 1 wherein injecting the encapsulation includes injecting the encapsulation through the dispense port with the hole connected to a vacuum suction.
3. The method as claimed in claim 1 wherein:
providing the package carrier includes providing the package carrier having more than one of the dispense port; and
injecting the encapsulation includes injecting the encapsulation through the more than one of the dispense port.
4. A method of manufacture, of an integrated circuit packaging system comprising:
providing a package carrier having a dispense port;
attaching an integrated circuit to the package carrier with an internal interconnect, the integrated circuit over the dispense port;
attaching an exposed interconnect to the package carrier;
placing a mold chase over the integrated circuit and on the package carrier, the mold chase having a hole; and
forming an encapsulation through the dispense port or the hole, the encapsulation surrounding the integrated circuit and the internal interconnect including completely filled in a space between the integrated circuit and the package carrier, and in a portion of the hole, the encapsulation having an elevated portion or a removal surface resulting from the elevated portion detached and a portion of the exposed interconnect exposed from the encapsulation.
5. The method as claimed in claim 4 further comprising mounting an interposer over the integrated circuit, the interposer partially exposed from the encapsulation.
6. The method as claimed in claim 4 further comprising attaching a heat sink to the integrated circuit, the heat sink over the encapsulation.
7. The method as claimed in claim 4 wherein attaching the integrated circuit includes attaching a flip chip to the package carrier.
8. An integrated circuit packaging system comprising:
a package carrier having a dispense port;
an integrated circuit attached to the package carrier and over the dispense port;
an encapsulation surrounding the integrated circuit including a space between the integrated circuit and the package carrier, and in a portion of the dispense port, the encapsulation having an elevated portion or a removal surface on a top surface of the encapsulation and resulting from the elevated portion detached; and
wherein:
the encapsulation has a cavity partially exposing the integrated circuit.
9. The system as claimed in claim 8 wherein the encapsulation is completely filled in a space between the package carrier and the integrated circuit.
10. The system as claimed in claim 8 wherein the encapsulation is exposed within the dispense port.
11. The system as claimed in claim 8 wherein:
the package carrier has more than one of the dispense port; and
the encapsulation is within the more than one of the dispense port.
12. The system as claimed in claim 8 wherein:
the integrated circuit attached to the package carrier includes an internal interconnect attached to the package carrier and the integrated circuit; and
the encapsulation covers the internal interconnect.
13. The system as claimed in claim 12 further comprising an interposer over the integrated circuit, the interposer partially exposed from the encapsulation.
14. The system as claimed in claim 12 further comprising a heat sink attached to the integrated circuit and over the encapsulation.
15. The system as claimed in claim 12 further comprising an exposed interconnect attached to the package carrier, a portion of the exposed interconnect exposed from the encapsulation.
16. The system as claimed in claim 12 wherein the integrated circuit is a flip chip attached to the package carrier.