Integrated circuit packaging system with trenches and method of manufacture thereof

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a substrate having a first side with a material layer including parallel grooves within the material layer of a trench in a fillet region of the substrate;

attaching an integrated circuit package to the substrate, sides of the integrated circuit package positioned substantially parallel to and adjacent the parallel grooves, wherein a first length of the parallel grooves adjacent opposing sides of the integrated circuit package is less than a length of the opposing sides, a second length of the parallel grooves adjacent other opposing sides is greater than a length of the other opposing sides, and the parallel grooves and the trench are formed around a perimeter of the integrated circuit package;

exposing an embedded trench trace, of the substrate, from underneath the parallel grooves, the embedded trench trace having an area substantially equivalent to an area of the trench;

forming a resin within the trench and between the substrate and the integrated circuit package, the resin contacting a top surface of the embedded trench trace exposed by the parallel grooves; and

wherein:

forming the resin includes exposing a visible side of the integrated circuit package completely from the resin, the visible side opposite and facing away from the first side of the substrate.

2. The method as claimed in claim 1 wherein:

providing the material layer includes forming a solder resist over the substrate.

3. The method as claimed in claim 1 further comprising:

configuring the parallel grooves to not overlap.

4. The method as claimed in claim 1 further comprising:

configuring adjacent offset channels displaced outward of the integrated circuit package and substantially parallel the parallel grooves.

5. A method of manufacture of an integrated circuit packaging system comprising:

providing a substrate having a first side with a material layer including perpendicular grooves intersecting parallel grooves within the material layer of a trench in a fillet region of the substrate, the perpendicular grooves positioned substantially perpendicular to the parallel grooves;

attaching an integrated circuit package to the substrate, sides of the integrated circuit package positioned substantially parallel to the parallel grooves, wherein the parallel grooves have a length longer than a length of the sides, and the parallel grooves, the perpendicular grooves, and the trench are formed around a perimeter of the integrated circuit package;

exposing an embedded trench trace, of the substrate, from underneath the perpendicular grooves and the parallel grooves, the embedded trench trace having an area substantially equivalent to an area of the trench;

forming a resin within the trench and between the substrate and the integrated circuit package, the resin contacting a top surface of the embedded trench trace exposed by the perpendicular grooves and the parallel grooves; and

wherein:

forming the resin includes exposing a visible side of the integrated circuit package completely from the resin, the visible side opposite and facing away from the first side of the substrate.

6. The method as claimed in claim 5 wherein:

providing the material layer includes forming a solder resist over the substrate.

7. The method as claimed in claim 5 wherein:

providing the integrated circuit package includes providing a flip chip.

8. The method as claimed in claim 5 further comprising:

configuring the perpendicular grooves as substantially perpendicular to the integrated circuit package.

9. The method as claimed in claim 5 further comprising:

configuring the parallel grooves and the perpendicular grooves as a cross-hatch design and to overlap.

10. A method of manufacture of an integrated circuit packaging system comprising:

providing a substrate having a first side with a material layer including holes within the material layer of a trench in a fillet region of the substrate, the holes configured as rows parallel to one another;

attaching an integrated circuit package to the substrate, wherein the holes in the trench, and the trench, are formed around a perimeter of the integrated circuit package;

exposing an embedded trench trace, of the substrate, from underneath the holes within the material layer, the embedded trench trace having an area substantially equivalent to an area of the trench;

forming a resin within the trench and between the substrate and the integrated circuit package, the resin contacting a top surface of the embedded trench trace exposed by the holes; and

wherein:

forming the resin includes exposing a visible side of the integrated circuit package completely from the resin, the visible side opposite and facing away from the first side of the substrate.

11. The method as claimed in claim 10 wherein:

providing the material layer includes forming a solder resist over the substrate.

12. The method as claimed in claim 10 wherein:

providing the integrated circuit package includes providing a flip chip.

13. The method as claimed in claim 10 further comprising:

configuring the holes as substantially parallel adjacent offset rows displaced outward of the integrated circuit package.

14. The method as claimed in claim 10 further comprising:

configuring each one of the holes as a discrete opening.

15. An integrated circuit packaging system comprising:

a substrate having a first side with a material layer including parallel grooves within the material layer of a trench in a fillet region of the substrate, and an embedded trench trace of the substrate exposed from underneath the parallel grooves, the embedded trench trace having an area substantially equivalent to an area of the trench;

an integrated circuit package attached to the substrate, sides of the integrated circuit package positioned substantially parallel to and adjacent the parallel grooves, wherein a first length of the parallel grooves adjacent opposing sides of the integrated circuit package is less than a length of the opposing sides, a second length of the parallel grooves adjacent other opposing sides is greater than a length of the other opposing sides, and the parallel grooves and the trench are formed around a perimeter of the integrated circuit package; and

a resin within the fillet region and between the substrate and the integrated circuit package, the resin contacting a top surface of the embedded trench trace exposed by the parallel grooves and, a visible side of the integrated circuit package, opposite and facing away from the first side of the substrate, completely exposed from the resin.

16. The system as claimed in claim 15 wherein:

the material layer includes a solder resist over the substrate.

17. The system as claimed in claim 15 wherein:

the parallel grooves do not overlap.

18. The system as claimed in claim 15 further comprising:

adjacent offset channels displaced outward of the integrated circuit package and substantially parallel the parallel grooves.

19. An integrated circuit packaging system comprising:

a substrate having a first side with a material layer including perpendicular grooves intersecting parallel grooves within the material layer of a trench in a fillet region of the substrate, the perpendicular grooves positioned substantially perpendicular to the parallel grooves, and an embedded trench trace of the substrate exposed from underneath the perpendicular grooves and the parallel grooves, the embedded trench trace having an area substantially equivalent to an area of the trench;

the parallel grooves positioned substantially parallel to sides of an integrated circuit package, wherein the parallel grooves have a length longer than a length of the sides, and the parallel grooves, the perpendicular grooves, and the trench are formed around a perimeter of the integrated circuit package; and

a resin within the trench and between the substrate and the integrated circuit package, the resin contacting a top surface of the embedded trench trace exposed by the perpendicular grooves and the parallel grooves, and a visible side of the integrated circuit package, opposite and facing away from the first side of the substrate, completely exposed from the resin.

20. The system as claimed in claim 19 wherein:

the material layer includes a solder resist over the substrate.

21. The system as claimed in claim 19 wherein:

the integrated circuit package is a flip chip.

22. The system as claimed in claim 19 wherein:

the perpendicular grooves are oriented substantially perpendicular to the integrated circuit package.

23. The system as claimed in claim 19 wherein:

the parallel grooves and the perpendicular grooves configured having a cross-hatch design and to overlap.

24. An integrated circuit packaging system comprising:

a substrate having a first side with a material layer including holes within the material layer of a trench in a fillet region of the substrate, the holes configured as rows parallel to one another, and an embedded trench trace of the substrate exposed from underneath the holes, the embedded trench trace having an area substantially equivalent to an area of the trench;

an integrated circuit package attached to the substrate, wherein the holes in the trench, and the trench, are formed around a perimeter of the integrated circuit package; and

a resin within the fillet region and between the substrate and the integrated circuit package, the resin contacting a top surface of the embedded trench trace exposed by the holes, and a visible side of the integrated circuit package, opposite and facing away from the first side of the substrate, completely exposed from the resin.

25. The system as claimed in claim 24 wherein:

the material layer includes a solder resist over the substrate.

26. The system as claimed in claim 24 wherein:

the integrated circuit package is a flip chip.

27. The system as claimed in claim 24 wherein:

the holes are configured as substantially parallel adjacent offset rows displaced outward of the integrated circuit package.

28. The system as claimed in claim 24 wherein:

each one of the holes is a discrete opening.