IP Library Granted Patent US 8,410,600
Granted Patent B2
US 8,410,600 · App. 12/876,614 · Granted Apr 2, 2013

Semiconductor device with protecting film and method of fabricating the semiconductor device with protecting film

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Quick Facts
Patent No.
US 8,410,600
App. No.
12/876,614
Filed
Sep 7, 2010
Granted
Apr 2, 2013
Kind
B2
Art Unit
2826
USPC
257/700
Abstract

Provided are a semiconductor device and a method of fabricating the semiconductor device, the semiconductor device including: a source trace, a drain trace, and a gate trace placed on a substrate; a transistor which is placed on the drain trace and includes a source pad and a gate pad; insulating films placed between the drain and source traces and between the drain and gate traces on the substrate so as to cover sidewall surfaces of the transistor; a source spray electrode which is placed on the insulating film between the source and drain traces and connects the source pad of the transistor and the source trace; and a gate spray electrode placed on the insulating film between the gate and drain traces and connects the gate pad of the transistor and the gate trace.

Claims (48)

1. A semiconductor device comprising:

a substrate;

a source trace, a drain trace, and a gate trace placed on the substrate;

a transistor which is placed on the drain trace and includes a source pad and a gate pad;

insulating films placed between the drain and source traces and between the drain and gate traces on the substrate to cover sidewall surfaces of the transistor;

a source spray electrode which is placed on the insulating film between the source and drain traces and connects the source pad of the transistor and the source trace;

a gate spray electrode which is placed on the insulating film between the gate and drain traces and connects the gate pad of the transistor and the gate trace; and

a protecting film placed on a surface of each insulating film, the protecting film being located any one of between the insulating film and the source spray electrode, and between the insulating film and the gate spray electrode.

2. The semiconductor device according to claim 1 , wherein

the insulating films are made of any one of silicone resin, polymer resin, polyimide resin, and epoxy resin.

3. The semiconductor device according to claim 1 , wherein

each of the insulating films is formed of a laminate film composed of ceramic layers formed by a spray technique.

4. The semiconductor device according to claim 3 , wherein

each of the ceramic layers is made of any one of alumina, aluminum nitride, and silicon nitride.

5. The semiconductor device according to claim 1 , wherein

each of the source and gate spray electrodes is made of any one of copper, silver, nickel, aluminum, platinum, palladium, nickel-chrome alloy, nickel aluminum alloy, nickel-chrome-silicon alloy, nickel-silicon alloy, and copper-nickel alloy.

6. The semiconductor device according to claim 1 , wherein

the protecting film is made of any one of silicone resin, polymer resin, polyimide resin, and epoxy resin.

7. The semiconductor device according to claim 1 , wherein

the transistor is composed of an SiC or GaN semiconductor.

8. A method of fabricating a semiconductor device comprising:

forming a substrate;

forming a source trace, a drain trace, and a gate trace on the substrate;

forming a transistor on the drain trace, the transistor including a source pad and a gate pad;

forming insulating films between the source and drain traces and between the gate and drain traces on the substrate, the insulating films covering sidewall surfaces of the transistor;

forming a source spray electrode on the insulating film between the source and drain traces, the source spray electrode connecting the source pad of the transistor and the source trace;

forming a gate spray electrode on the insulating film between the gate and drain traces, the gate spray electrode connecting the gate pad of the transistor and the gate trace, wherein

the forming the source spray electrode and the forming the gate spray electrode include:

attaching masking tapes to the source trace, the gate trace, and the transistor;

forming the source and gate spray electrodes simultaneously with a spray technique; and

removing the masking tapes.

9. The method of claim 8 , wherein

forming the insulating films includes forming a plurality of ceramic layers with a spray technique.

10. The method of claim 8 , further comprising:

after forming the transistor on the drain trace, individually forming wire bonds between the source trace and source pad, between the source trace and gate pad, between the gate trace and the source pad, and between the gate trace and the gate pad; and

cutting the wire bonds after the forming the source spray electrode and the forming the gate spray electrode.

11. The method of claim 8 further comprising:

forming a protecting film on a surface of each insulating film.

12. The method of claim 8 , wherein

the insulating films are made of any one of silicone resin, polymer resin, polyimide resin, and epoxy resin.

13. The method of claim 8 , wherein

the insulating film is made of a laminate film including ceramic layers formed with a spray technique.

14. The method of claim 13 , wherein

the ceramic layers are made of any one of alumina, aluminum nitride, and silicon nitride.

15. The method of claim 8 , wherein

each of the source and gate spray electrodes is made of any one of copper, silver, nickel, aluminum, platinum, palladium, nickel-chrome alloy, nickel-aluminum alloy, nickel-chrome-silicon alloy, nickel-silicon alloy, and copper-nickel alloy.

16. The method of claim 11 , wherein

the protecting film is made of any one of silicone resin, polymer resin, polyimide resin, and epoxy resin.

Assignments (12)
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Mar 26, 2026
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 075280/0919 →
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY COLLATERAL AT REEL/FRAME NO. 64185/0755 Recorded Sep 30, 2025
From: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WOLFSPEED, INC.
Reel/Frame 072989/0001 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0113 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0381 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0467 →
NOTICE OF GRANT OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Sep 30, 2025
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 072992/0588 →
SECURITY INTEREST Recorded Jun 30, 2023
From: WOLFSPEED, INC.
To: U.S. BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 064185/0755 →
CHANGE OF NAME Recorded Feb 14, 2022
From: CREE, INC.
To: WOLFSPEED, INC.
Reel/Frame 059085/0667 →
MERGER Recorded Aug 13, 2021
From: CREE FAYETTEVILLE, INC.
To: CREE, INC.
Reel/Frame 057291/0406 →
MERGER AND CHANGE OF NAME Recorded Sep 9, 2015
From: ARKANSAS POWER ELECTRONICS INTERNATIONAL, INC.; CREE FAYETTEVILLE, INC.
To: CREE FAYETTEVILLE, INC.
Reel/Frame 036522/0649 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2011
From: LOSTETTER, ALEXANDER B.; HORNBERGER, JARED; OTSUKA, TAKUKAZU
To: ARKANSAS POWER ELECTRONICS INTERNATIONAL, INC.; ROHM CO., LTD.
Reel/Frame 026359/0603 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2010
From: LOSTETTER, ALEXANDER B; HORNBERGER, JARED; OTSUKA, TAKUKAZU
To: ARKANSAS POWER ELECTRONICS INTERNATIONAL, INC.; ROHM CO., LTD.
Reel/Frame 025396/0459 →