IP Library Granted Patent US 8,074,868
Granted Patent B2
US 8,074,868 · App. 12/956,524 · Granted Dec 13, 2011

Fabrication method of semiconductor integrated circuit device

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Quick Facts
Patent No.
US 8,074,868
App. No.
12/956,524
Granted
Dec 13, 2011
Kind
B2
Abstract

Productivity is to be improved in assembling a semiconductor integrated circuit device. A matrix substrate is provided and semiconductor chips are disposed on a first heating stage, then the matrix substrate is disposed above the semiconductor chips on the first heating stage, subsequently the semiconductor chips and the matrix substrate are bonded to each other temporarily by thermocompression bonding while heating the chips directly by the first heating stage, thereafter the temporarily bonded matrix substrate is disposed on a second heating stage adjacent to the first heating stage, and then on the second heating stage the semiconductor chips are thermocompression-bonded to the matrix substrate while being heated directly by the second heating stage.

Claims (29)

1. A method of fabricating a semiconductor integrated circuit device, comprising the steps of:

(a) providing an organic wiring substrate;

b) disposing a plurality of semiconductor chips over a first stage;

(c) disposing the substrate at first main surface sides of the semiconductor chips over the first stage and bonding the semiconductor chips and the substrate to each other temporarily by thermocompression bonding while heating the semiconductor chips from second main surface sides of the chips over the first stage;

(d) after the step (c), disposing the temporarily bonded semiconductor chips and substrate over a second stage adjacent to the first stage; and

(e) pressurizing the semiconductor chips over the second stage while heating the semiconductor chips from the second main surface sides of the chips to effect a main bonding of the semiconductor chips and the substrate by thermocompression bonding in such a manner that the plural semiconductor chips disposed over the second stage are subjected all together to a main bonding to the substrate by thermocompression bonding, wherein the temperature of the heating of the semiconductor chips from the second main surface sides of the chips over the second stage is lower than the glass transition temperature of an organic resin which constitutes a principal portion of the organic wiring substrate.

2. The method according to claim 1 , wherein in the step (e), the heating temperature at the semiconductor chip side is higher than that at the substrate side.

3. The method according to claim 1 , wherein the heating of the semiconductor chips from the second main surface sides of the chips over the second stage is performed directly without interposition of the organic wiring substrate.

4. The method according to claim 1 , wherein the organic wiring substrate is a multi-layer wiring substrate.

5. The method according to claim 1 , wherein the bonding between the semiconductor chips and the substrate is performed through an organic layer lower in modulus of rigidity than an organic resin which constitutes a principal portion of the substrate.

6. A method of fabricating a semiconductor integrated circuit device, comprising the steps of:

(a) providing an organic wiring substrate;

(b) disposing a plurality of semiconductor chips over a first stage;

(c) disposing the substrate at first main surface sides of the semiconductor chips over the first stage and bonding the semiconductor chips and the substrate to each other temporarily by thermocompression bonding while heating the semiconductor chips from second main surface sides of the chips over the first stage;

(d) after the step (c), disposing the temporarily bonded semiconductor chips and substrate over a second stage adjacent to the first stage; and

(e) pressurizing the semiconductor chips over the second stage while heating the semiconductor chips to effect a main bonding of the semiconductor chips and the substrate by thermocompression bonding in such a manner that the plural semiconductor chips disposed over the second stage are subjected all together to a main bonding to the substrate by thermocompression bonding, wherein the temperature of the heating of the semiconductor chips from the second main surface sides of the chips over the second stage is lower than the glass transition temperature of an organic resin which constitutes a principal portion of the organic wiring substrate.

7. The method according to claim 6 , wherein in the step (e), the heating temperature at the semiconductor chip side is higher than that at the substrate side.

8. The method according to claim 6 , wherein the heating of the semiconductor chips from the second main surface sides of the chips over the second stage is performed directly without interposition of the organic wiring substrate.

9. The method according to claim 6 , wherein the organic wiring substrate is a multi-layer wiring substrate.

10. The method according to claim 6 , wherein the bonding between the semiconductor chips and the substrate is performed through an organic layer lower in modulus of rigidity than an organic resin which constitutes a principal portion of the substrate.

11. A method of fabricating a semiconductor integrated circuit device, comprising the steps of:

(a) providing an organic wiring substrate;

(b) disposing a plurality of semiconductor chips over a first stage;

(c) disposing the substrate at first main surface sides of the semiconductor chips over the first stage and bonding the semiconductor chips and the substrate to each other temporarily by thermocompression bonding while heating the semiconductor chips from second main surface sides of the chips over the first stage;

(d) after the step (c), disposing the temporarily bonded semiconductor chips and substrate over a second stage adjacent to the first stage; and

(e) pressurizing the semiconductor chips over the second stage while heating the semiconductor chips to effect a main bonding of the semiconductor chips and the substrate by thermocompression bonding in such a manner that the plural semiconductor chips disposed over the second stage are subjected all together to a main bonding to the substrate by thermocompression bonding, wherein the bonding between the semiconductor chips and the substrate is performed through an organic layer lower in modulus of rigidity than an organic resin which constitutes a principal portion of the substrate.

12. The method according to claim 11 , wherein in the step (e), the heating temperature at the semiconductor chip side is higher than that at the substrate side.

13. The method according to claim 11 , wherein the heating of the semiconductor chips from the second main surface sides of the chips over the second stage is performed directly without interposition of the organic wiring substrate.

14. The method according to claim 11 , wherein the organic wiring substrate is a multi-layer wiring substrate.

Assignments (6)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER Recorded Sep 20, 2017
From: RENESAS EASTERN JAPAN SEMICONDUCTOR, INC.
To: RENESAS NORTHERN JAPAN SEMICONDUCTOR, INC.
Reel/Frame 043638/0393 →
MERGER AND CHANGE OF NAME Recorded May 12, 2017
From: RENESAS TECHNOLOGY CORP.; NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 042355/0837 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2017
From: MAKI, HIROSHI; TANI, YUKIO
To: RENESAS TECHNOLOGY CORP.; RENESAS EASTERN JAPAN SEMICONDUCTOR, INC.
Reel/Frame 042356/0327 →
CHANGE OF NAME Recorded May 12, 2017
From: RENESAS SEMICONDUCTOR KYUSHU YAMAGUCHI CO., LTD.
To: RENESAS SEMICONDUCTOR PACKAGE & TEST SOLUTIONS CO., LTD.
Reel/Frame 042484/0880 →
MERGER Recorded May 12, 2017
From: RENESAS NORTHERN JAPAN SEMICONDUCTOR, INC.
To: RENESAS SEMICONDUCTOR KYUSHU YAMAGUCHI CO., LTD.
Reel/Frame 042609/0807 →