IP Library Granted Patent US 8,525,344
Granted Patent B2
US 8,525,344 · App. 13/034,075 · Granted Sep 3, 2013

Semiconductor device and method of forming bond wires between semiconductor die contact pads and conductive TOV in peripheral area around semiconductor die

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Quick Facts
Patent No.
US 8,525,344
App. No.
13/034,075
Granted
Sep 3, 2013
Kind
B2
Abstract

A semiconductor wafer has a plurality of semiconductor die with contact pads. An organic material is deposited in a peripheral region around the semiconductor die. A portion of the organic material is removed to form a plurality of vias. A conductive material is deposited in the vias to form conductive TOV. The conductive TOV can be recessed with respect to a surface of the semiconductor die. Bond wires are formed between the contact pads and conductive TOV. The bond wires can be bridged in multiple sections across the semiconductor die between the conductive TOV and contact pads. An insulating layer is formed over the bond wires and semiconductor die. The semiconductor wafer is singulated through the conductive TOV or organic material between the conductive TOV to separate the semiconductor die. A plurality of semiconductor die can be stacked and electrically connected through the bond wires and conductive TOV.

Claims (37)

1. A semiconductor device, comprising:

a semiconductor die;

an insulating material formed in a peripheral region extending from an active surface of the semiconductor die to a back surface of the semiconductor die;

a first conductive via formed through the insulating material in the peripheral region around the semiconductor die;

a bond wire coupled between a contact pad on the semiconductor die and a portion of the first conductive via exposed from the insulating material; and

an insulating layer formed over the bond wire and semiconductor die.

2. The semiconductor device of claim 1 , further including a plurality of stacked semiconductor die electrically connected through the bond wires and first conductive vias.

3. The semiconductor device of claim 1 , wherein the first conductive via is recessed with respect to a surface of the semiconductor die.

4. The semiconductor device of claim 1 , further including a plurality of second conductive vias formed through the semiconductor die.

5. The semiconductor device of claim 2 , further including:

a first bond wire formed between the contact pad of the semiconductor die and a bridging bond pad on a surface of the semiconductor die; and

a second bond wire formed between the bridging bond pad and the first conductive via.

6. The semiconductor device of claim 1 , further including a stud bump formed over the bond wire.

7. A semiconductor device, comprising:

a semiconductor wafer including a plurality of semiconductor die;

an insulating material deposited between the semiconductor die;

a plurality of first conductive vias formed in the insulating material;

a plurality of bond wires coupled between contact pads on the semiconductor die and the first conductive vias; and

an insulating layer formed over the bond wires and semiconductor die.

8. The semiconductor device of claim 7 , further including a stud bump formed over the bond wires.

9. The semiconductor device of claim 7 , wherein the first conductive vias are recessed with respect to a surface of the semiconductor die.

10. The semiconductor device of claim 7 , further including a plurality of second conductive vias formed through the semiconductor die.

11. The semiconductor device of claim 7 , wherein the bond wires include:

a first bond wire formed between the contact pads of the semiconductor die and a bridging bond pad on a surface of the semiconductor die; and

a second bond wire formed between the bridging bond pads and the first conductive vias.

12. A semiconductor device, comprising:

a semiconductor die;

an insulating material disposed in a peripheral region around the semiconductor die;

a first conductive via formed through the insulating material; and

a bond wire formed between a contact pad on the semiconductor die and the first conductive via.

13. The semiconductor device of claim 12 , further including a plurality of stacked semiconductor die electrically connected through the bond wires and first conductive vias.

14. The semiconductor device of claim 12 , wherein the first conductive via is recessed with respect to a surface of the semiconductor die.

15. The semiconductor device of claim 12 , further including a plurality of second conductive vias formed through the semiconductor die.

16. The semiconductor device of claim 12 , further including:

a first bond wire formed between the contact pad of the semiconductor die and a bridging bond pad on a surface of the semiconductor die; and

a second bond wire formed between the bridging bond pad and the first conductive via.

17. The device of claim 12 , further including a stud bump formed over the bond wire.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE," TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038401 FRAME: 0532. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0109 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 11, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038401/0532 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2011
From: PAGAILA, REZA A.; DO, BYUNG TAI; MERILO, DIOSCORO A.
To: STATS CHIPPAC, LTD.
Reel/Frame 025859/0986 →