Semiconductor device and method of forming a wafer level package structure using conductive via and exposed bump
View Patent ↗A semiconductor device has a carrier. A semiconductor wafer including a semiconductor die is mounted to the carrier with an active surface of the semiconductor die facing away from the carrier. A plurality of bumps is formed over the active surface of the semiconductor die. An opening is formed in a periphery of the semiconductor die. An encapsulant is deposited over the carrier and semiconductor die, in the opening, and around the plurality of bumps such that an exposed portion of the plurality of bumps is devoid of encapsulant. A conductive via is formed through the encapsulant, within the opening, and extends to the carrier. A conductive layer is formed over the encapsulant and electrically connects to the conductive via and the exposed portion of the plurality of bumps. The carrier is removed to expose an end of the conductive via.
1. A method of making a semiconductor device, comprising:
providing a carrier;
mounting a semiconductor wafer including a plurality of semiconductor die to the carrier with an active surface of the plurality of semiconductor die facing away from the carrier;
forming a plurality of bumps over the active surface of the plurality of semiconductor die;
removing a portion of the semiconductor wafer to form an opening between the plurality of semiconductor die;
depositing an encapsulant over the carrier and plurality of semiconductor die, in the opening, and around the plurality of bumps such that an exposed portion of the plurality of bumps is devoid of encapsulant;
forming a via through the encapsulant, within the opening, and extending to the carrier;
depositing a conductive material in the via to form a conductive via;
forming a conductive layer over the encapsulant and electrically connected to the conductive via and the exposed portion of the plurality of bumps, the conductive layer having a thickness less than a height of the exposed portion of the plurality of bumps; and
removing the carrier to expose an end of the conductive via.
2. The method of claim 1 , wherein a back surface of the plurality of semiconductor die opposite the active surface is devoid of encapsulant, resulting in an exposed flipchip structure.
3. The method of claim 2 , further including mounting a heat spreader to the back surface of the plurality of semiconductor die.
4. The method of claim 1 , further including forming the conductive via through the encapsulant in a periphery of the plurality of semiconductor die for through vertical interconnect.
5. The method of claim 1 , further including stacking a plurality of semiconductor devices to form a package on package wafer level chip scale package.
6. The method of claim 1 , wherein depositing the encapsulant around the plurality of bumps eliminates a need for an underfill material.
7. A method of making a semiconductor device, comprising:
providing a carrier;
mounting a semiconductor die to the carrier with an active surface of the semiconductor die facing away from the carrier;
forming a plurality of bumps over the active surface of the semiconductor die;
depositing an encapsulant over the carrier, semiconductor die, and around the plurality of bumps such that an exposed portion of the plurality of bumps is devoid of encapsulant;
forming a via extending through the encapsulant to the carrier;
depositing a conductive material in the via to form a conductive via;
forming a conductive layer over the encapsulant and electrically connected to the conductive via and the exposed portion of the plurality of bumps; and
removing the carrier to expose an end of the conductive via.
8. The method of claim 7 , wherein a back surface of the semiconductor die opposite the active surface is devoid of encapsulant, resulting in an exposed flipchip structure.
9. The method of claim 8 , further including mounting a heat spreader to the back surface of the semiconductor die.
10. The method of claim 7 , further including forming the conductive via through the encapsulant in a periphery of the semiconductor die for through vertical interconnect.
11. The method of claim 7 , further including stacking a plurality of semiconductor devices to form a package on package wafer level chip scale package.
12. The method of claim 7 , wherein depositing the encapsulant around the plurality of bumps eliminates a need for an underfill material.
13. The method of claim 7 , wherein the conductive layer has a thickness less than a height of the exposed portion of the plurality of bumps.
14. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming a bump over an active surface of the semiconductor die;
depositing an encapsulant over the semiconductor die and around the bump such that an exposed portion of the bump is devoid of encapsulant;
forming a conductive via that extends through the encapsulant; and
forming a conductive layer over the encapsulant and electrically connected to the conductive via and the exposed portion of the bump.
15. The method of claim 14 , wherein a back surface of the semiconductor die opposite the active surface is devoid of encapsulant, resulting in an exposed flipchip structure.
16. The method of claim 15 , further including mounting a heat spreader to the back surface of the semiconductor die.
17. The method of claim 14 , further including forming the conductive via through the encapsulant in a periphery of the semiconductor die for through vertical interconnect.
18. The method of claim 14 , further including stacking a plurality of semiconductor devices to form a package on package wafer level chip scale package.
19. The method of claim 14 , wherein depositing the encapsulant around the bump eliminates a need for an underfill material.
20. The method of claim 14 , wherein the conductive layer has a thickness less than a height of the exposed portion of the bump.