IP Library Granted Patent US 8,835,301
Granted Patent B2
US 8,835,301 · App. 13/037,181 · Granted Sep 16, 2014

Semiconductor device and method of forming bump structure with insulating buffer layer to reduce stress on semiconductor wafer

Inventors: JoonYoung Choi (Kyoung-ki-do, KR); YoungJoon Kim (Kyoungki-do, KR); SungWon Cho (Kyoung-gi-Do, KR)
Assignee: STATS ChipPAC, Ltd.
H01L24/03H01L2224/1145H01L2224/05073H01L2224/13007H01L2224/05111H01L2224/13647H01L2224/16238H01L2224/05624H01L24/05H01L2224/05011H01L2924/01029H01L2224/1146H01L2224/03452H01L2224/05611H01L2924/00013H01L2224/136H01L2224/05644H01L2224/05027H01L2224/13655H01L2224/10126H01L2224/05558H01L2224/05018H01L2224/05144H01L2224/13613H01L2224/05139H01L2924/01322H01L2224/03903H01L24/13H01L2224/05655H01L2224/81191H01L2224/05566H01L2224/0508H01L24/16H01L24/11H01L2224/13616H01L2224/1147H01L2224/13022H01L2224/13624H01L2224/13639H01L2224/05647H01L2224/0345H01L2224/05155H01L2224/05573H01L2224/0401H01L2224/13644H01L2224/05147H01L2224/0346H01L2224/05124H01L2224/13611H01L2924/13901H01L2224/05639H01L2224/05572H01L2224/02126H01L2224/11849
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Quick Facts
Patent No.
US 8,835,301
App. No.
13/037,181
Granted
Sep 16, 2014
Kind
B2
Abstract

A semiconductor wafer has a plurality of semiconductor die with contact pads for electrical interconnect. An insulating layer is formed over the semiconductor wafer. A bump structure is formed over the contact pads. The bump structure has a buffer layer formed over the insulating layer and contact pad. A portion of the buffer layer is removed to expose the contact pad and an outer portion of the insulating layer. A UBM layer is formed over the buffer layer and contact pad. The UBM layer follows a contour of the buffer layer and contact pad. A ring-shaped conductive pillar is formed over the UBM layer using a patterned photoresist layer filled with electrically conductive material. A conductive barrier layer is formed over the ring-shaped conductive pillar. A bump is formed over the conductive barrier layer. The buffer layer reduces thermal and mechanical stress on the bump and contact pad.

Claims (75)

1. A method of making a semiconductor device, comprising:

providing a semiconductor wafer having a contact pad;

forming an insulating layer over the semiconductor wafer;

forming a buffer layer over the insulating layer and contact pad;

removing a portion of the buffer layer to expose the contact pad;

forming a first conductive layer over the buffer layer and contact pad, the first conductive layer being electrically connected to the contact pad;

forming a ring-shaped conductive pillar over the first conductive layer;

forming a second conductive layer over the ring-shaped conductive pillar; and

forming a bump over the second conductive layer.

2. The method of claim 1 , wherein the buffer layer reduces stress on the bump and contact pad.

3. The method of claim 1 , wherein forming the ring-shaped conductive pillar includes:

forming a photoresist layer over the first conductive layer;

removing a portion of the photoresist layer to create a ring-shaped opening and expose the first conductive layer;

depositing an electrically conductive material in the ring-shaped opening over the first conductive layer; and

removing the photoresist layer.

4. The method of claim 1 , wherein forming the bump includes:

forming a photoresist layer over the first conductive layer;

removing a portion of the photoresist layer to expose the first conductive layer and ring-shaped conductive pillar;

depositing bump material over the first conductive layer and ring-shaped conductive pillar; and

reflowing the bump material to form the bump.

5. The method of claim 1 , wherein the first conductive layer follows a contour of the buffer layer and contact pad.

6. The method of claim 1 , wherein the first conductive layer is an under bump metallization layer and the second conductive layer is a barrier layer.

7. A method of making a semiconductor device, comprising:

providing a semiconductor die having a contact pad;

forming an insulating layer over the semiconductor die;

forming a buffer layer over the insulating layer and contact pad;

forming a first conductive layer over the buffer layer and contact pad;

forming a conductive pillar over the first conductive layer;

forming a second conductive layer over the conductive pillar; and

forming an electrical interconnect over the second conductive layer.

8. The method of claim 7 , wherein the buffer layer reduces stress on the electrical interconnect and contact pad.

9. The method of claim 7 , wherein the conductive pillar has a ring shape.

10. The method of claim 7 , wherein the electrical interconnect includes a bump.

11. The method of claim 7 , wherein forming the conductive pillar includes:

forming a photoresist layer over the first conductive layer;

removing a portion of the photoresist layer to expose the first conductive layer;

depositing an electrically conductive material over the first conductive layer; and

removing the photoresist layer.

12. The method of claim 7 , wherein forming the bump includes:

forming a photoresist layer over the first conductive layer;

removing a portion of the photoresist layer to expose the first conductive layer and conductive pillar;

depositing bump material over the first conductive layer and conductive pillar; and

reflowing the bump material to form the bump.

13. The method of claim 7 , wherein the first conductive layer follows a contour of the buffer layer and contact pad.

14. A method of making a semiconductor device, comprising:

providing a semiconductor die having a contact pad;

forming a buffer layer over the semiconductor die and contact pad;

forming a first conductive layer over the buffer layer and contact pad;

forming a conductive pillar over the first conductive layer; and

forming an electrical interconnect over the conductive pillar and first conductive layer.

15. The method of claim 14 , further including forming an insulating layer over the semiconductor die prior to forming the buffer layer.

16. The method of claim 14 , further including forming a second conductive layer over the conductive pillar.

17. The method of claim 14 , wherein the buffer layer reduces stress on the electrical interconnect and contact pad.

18. The method of claim 14 , wherein the conductive pillar has a ring shape.

19. The method of claim 14 , wherein forming the conductive pillar includes:

forming a photoresist layer over the first conductive layer;

removing a portion of the photoresist layer to expose the first conductive layer;

depositing an electrically conductive material over the first conductive layer; and

removing the photoresist layer.

20. The method of claim 14 , wherein forming the bump includes:

forming a photoresist layer over the first conductive layer;

removing a portion of the photoresist layer to expose the first conductive layer and conductive pillar;

depositing bump material over the first conductive layer and conductive pillar; and

reflowing the bump material to form the bump.

21. A semiconductor device, comprising:

a semiconductor die having a contact pad;

an insulating layer disposed over the semiconductor die;

a buffer layer disposed over the insulating layer and contact pad;

a first conductive layer disposed over the buffer layer and contact pad;

a conductive pillar disposed over the first conductive layer; and

an electrical interconnect disposed over the second conductive layer.

22. The semiconductor device of claim 21 , wherein the buffer layer reduces stress on the electrical interconnect and contact pad.

23. The semiconductor device of claim 21 , wherein the conductive pillar has a ring shape.

24. The semiconductor device of claim 21 , further including a second conductive layer disposed over the conductive pillar.

25. The semiconductor device of claim 21 , wherein the first conductive layer follows a contour of the buffer layer and contact pad.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE SPELLING OF THE ASSIGNEE'S NAME ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0161. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064805/0735 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0161 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2011
From: CHOI, JOONYOUNG; KIM, YOUNGJOON; CHO, SUNGWON
To: STATS CHIPPAC, LTD.
Reel/Frame 025874/0712 →
Continuity (1)
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