Method of manufacturing integrated circuit packaging system with support structure
View Patent ↗A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a connection post on the substrate, the connection post having a post top and a post side; mounting an integrated circuit die on the substrate, the integrated circuit die having a top die surface; molding an encapsulation on the integrated circuit die and the connection post; and forming a connector recess in the encapsulation by removing the encapsulation around the connection post exposing a portion of the post side.
1. A method of manufacture of an integrated circuit packaging system comprising:
providing a substrate:
forming a connection post on the substrate, the connection post having a post top and a post side;
mounting an integrated circuit die on the substrate, the integrated circuit die having a top die surface;
molding an encapsulation on the integrated circuit die and the connection post; and
forming a connector recess in the encapsulation by removing the encapsulation around the connection post exposing a portion of the post side for forming a funnel-shaped recess centered around the connection post.
2. The method as claimed in claim 1 wherein:
molding the encapsulation includes molding a top encapsulation surface of the encapsulation coplanar with the post top; and
further comprising:
attaching an external interconnect to the substrate.
3. The method as claimed in claim 1 wherein molding the encapsulation on the integrated circuit die includes fully covering the integrated circuit die with the encapsulation.
4. The method as claimed in claim 1 wherein forming the connection post on the substrate includes attaching the connection post having a post top lower than the top die surface.
5. A method of manufacture of an integrated circuit packaging system comprising:
providing a substrate;
forming a connection post on the substrate, the connection post having a post top and a post side;
mounting an integrated circuit die on the substrate, the integrated circuit die having a top die surface;
molding an encapsulation on the integrated circuit die and the connection post;
forming a connector recess in the encapsulation by removing the encapsulation around the connection post exposing a portion of the post side for forming a funnel-shaped recess centered around the connection post; and
attaching an external interconnect to the substrate.
6. The method as claimed in claim 5 wherein molding the encapsulation on the integrated circuit die includes exposing the top die surface of the integrated circuit die.
7. The method as claimed in claim 5 wherein molding the encapsulation on the integrated circuit die and the connection post includes:
positioning a mold chase over the integrated circuit die and the connection post; and
molding the encapsulation on the integrated circuit die and the connection post between the mold chase and the substrate.
8. The method as claimed in claim 5 further comprising attaching with an internal interconnect the integrated circuit die to the substrate.
9. The method as claimed in claim 5 wherein molding the encapsulation includes molding a top encapsulation surface of the encapsulation coplanar with the post top and the top die surface.
10. An integrated circuit packaging system comprising:
a substrate;
a connection post formed on the substrate, the connection post having a post top and a post side;
an integrated circuit die mounted on the substrate, the integrated circuit die having a top die surface; and
an encapsulation molded on the integrated circuit die and the connection post, the encapsulation including the encapsulation having a connector recess in the encapsulation around the connection post exposing a portion of the post side, wherein the connector recess is a funnel-shaped recess centered around the connection post.
11. The system as claimed in claim 10 wherein:
the encapsulation includes a top encapsulation surface of the encapsulation coplanar with the post top; and
further comprising:
an external interconnect attached to the substrate.
12. The system as claimed in claim 10 wherein the encapsulation fully covers the integrated circuit die.
13. The system as claimed in claim 10 wherein the connection post includes the post top lower than the top die surface.
14. The system as claimed in claim 10 further comprising an external interconnect attached to the substrate.
15. The system as claimed in claim 14 wherein the top die surface of the integrated circuit die is exposed through the encapsulation.
16. The system as claimed in claim 14 wherein the post top is coplanar with a top encapsulation surface of the encapsulation.
17. The system as claimed in claim 14 further comprising an internal interconnect attached to the integrated circuit die and the substrate.
18. The system as claimed in claim 14 wherein a top encapsulation surface of the encapsulation is coplanar with the post top and the top die surface.