Wafer level die integration and method therefor

1. A method of making a semiconductor device, comprising:

providing a first substrate;

forming an insulating layer over the first substrate;

forming a conductive layer over the insulating layer;

forming an interconnect structure over the conductive layer;

disposing a second substrate over the interconnect structure opposite the first substrate;

removing the first substrate;

forming an opening in the insulating layer over the conductive layer;

disposing a semiconductor die over the conductive layer opposite the second substrate;

depositing an encapsulant over the semiconductor die and insulating layer; and

removing the second substrate.

2. The method of claim 1 , wherein the first substrate includes a glass transition temperature of greater than 200° C.

3. The method of claim 1 , further including forming a release layer over the first substrate.

4. The method of claim 1 , further including forming a heat spreader over the semiconductor die.

5. The method of claim 1 , further including forming a plurality of electrical interconnects between the semiconductor die and conductive layer.

6. The method of claim 5 , wherein the electrical interconnects include bond wires, bumps, or stud bumps.

7. A method of making a semiconductor device, comprising:

providing a substrate;

forming a first conductive layer over the substrate;

forming a first interconnect structure over the first conductive layer and substrate;

forming a second conductive layer over the first interconnect structure;

forming a plurality of conductive pillars over the second conductive layer;

disposing a semiconductor die over and electrically connected to the second conductive layer between the conductive pillars;

depositing an encapsulant over the semiconductor die and first interconnect structure and around the second conductive layer and conductive pillars;

removing a portion of the encapsulant;

forming a second interconnect structure over the encapsulant; and

removing the substrate.

8. The method of claim 7 , wherein the second interconnect structure includes passive circuits and active circuits.

9. The method of claim 7 , further including forming a plurality of bumps over the first interconnect structure opposite the semiconductor die.

10. The method of claim 7 , further including forming a buffer layer over the semiconductor die and encapsulant prior to forming the second interconnect structure.

11. The method of claim 7 , further including forming a portion of the first interconnect structure using a process temperature greater than 200° C.

12. The method of claim 7 , further including forming a portion of the second interconnect structure using a process temperature less than 200° C.

13. The method of claim 7 , wherein the substrate includes a glass transition temperature greater than 200° C.

14. The method of claim 7 , further including forming the second conductive layer to a thickness of 5 to 40 micrometers.

15. The method of claim 7 , further including forming the plurality of conductive pillars using a plating process.

16. A method of making a semiconductor device, comprising:

providing a substrate including a glass transition temperature greater than 200° C.;

forming a first interconnect structure over the substrate using a process temperature greater than 200° C.;

forming a plurality of conductive pillars over the first interconnect structure;

disposing a semiconductor die over the first interconnect structure between the conductive pillars;

depositing an encapsulant over the semiconductor die, first interconnect structure, and conductive pillars;

forming a second interconnect structure over the encapsulant using a process temperature less than 200° C.; and

removing the substrate.

17. The method of claim 16 , wherein forming the second interconnect structure includes:

forming a conductive layer over the encapsulant; and

forming an insulating layer over the conductive layer.

18. The method of claim 16 , wherein the second interconnect structure includes passive circuits and active circuits.

19. The method of claim 16 , further including forming a buffer layer over the semiconductor die and encapsulant.

20. The method of claim 16 , further including removing a portion of the encapsulant over the conductive pillars.

21. The method of claim 16 , further including:

forming a conductive layer over the first interconnect structure; and

forming the plurality of conductive pillars on the conductive layer.

22. The method of claim 16 , further including forming the plurality of conductive pillars using a plating process.

23. A method of making a semiconductor device, comprising:

providing a substrate including a glass transition temperature greater than 200° C.;

forming a first interconnect structure over the substrate using a process temperature greater than 200° C.;

disposing a semiconductor die over the first interconnect structure;

depositing an encapsulant over and the semiconductor die;

forming a first conductive layer over the encapsulant using a process temperature less than 200° C.;

forming an insulating layer over the first conductive layer using a process temperature less than 200° C.; and

removing the substrate.

24. The method of claim 23 , further including:

forming a plurality of conductive pillars over the first interconnect structure; and

disposing the semiconductor die between the conductive pillars.

25. The method of claim 24 , further including:

forming a second conductive layer over the first interconnect structure; and

forming the conductive pillars on the second conductive layer.

26. The method of claim 23 , further including forming a buffer layer over the semiconductor die and encapsulant prior to forming the first conductive layer.

27. The method of claim 23 , further including:

forming a second conductive layer over the substrate; and

forming the first interconnect structure over the second conductive layer.

28. The method of claim 23 , further including forming passive circuits and active circuits over the encapsulant.

29. A method of making a semiconductor device, comprising:

providing a substrate including a glass transition temperature;

forming a first interconnect structure over the substrate using a first process temperature;

disposing a semiconductor die over the first interconnect structure;

depositing an encapsulant over and the semiconductor die;

forming a second interconnect structure over the encapsulant using a second process temperature less than the first process temperature; and

removing the substrate.

30. The method of claim 29 , wherein:

the first process temperature is greater than 200° C.; and

the second process temperature is less than 200° C.

31. The method of claim 29 , wherein forming the second interconnect structure includes:

forming a conductive layer over the encapsulant; and

forming an insulating layer over the conductive layer.

32. The method of claim 29 , wherein the second interconnect structure includes passive circuits and active circuits.

33. The method of claim 29 , further including:

forming a conductive layer over the first interconnect structure; and

forming a plurality of conductive pillars on the conductive layer.

34. The method of claim 33 , further including:

forming the conductive layer using a first plating process; and

forming the plurality of conductive pillars using a second plating process.