IP Library Granted Patent US 8,492,888
Granted Patent B2
US 8,492,888 · App. 13/224,725 · Granted Jul 23, 2013

Integrated circuit packaging system with stiffener and method of manufacture thereof

Inventors: HeeJo Chi (Ichon-si, KR); NamJu Cho (Uiwang-si, KR); HanGil Shin (Seongnam-si, KR)
Assignee: STATS ChipPAC Ltd.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,492,888
App. No.
13/224,725
Granted
Jul 23, 2013
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a stiffener, having a stiffener opening completely through the stiffener, on the substrate; molding an encapsulation on the substrate and directly on an outer upper periphery surface of the stiffener and exposing an inner upper periphery surface of the stiffener, the encapsulation exposing a portion of the substrate; mounting an integrated circuit over the substrate and within the perimeter of the stiffener; and attaching a lid plate on the inner upper periphery surface of the stiffener and over the integrated circuit, the lid plate extending above an encapsulation top side.

Claims (41)

1. A method of manufacture of an integrated circuit packaging system comprising:

providing a substrate;

mounting a stiffener, having a stiffener opening completely through the stiffener, on the substrate;

molding an encapsulation on the substrate and directly on an outer upper periphery surface of the stiffener and exposing an inner upper periphery surface of the stiffener, the encapsulation exposing a portion of the substrate;

mounting an integrated circuit over the substrate and within the perimeter of the stiffener; and

attaching a lid plate on the inner upper periphery surface of the stiffener and over the integrated circuit, the lid plate extending above an encapsulation top side.

2. The method as claimed in claim 1 wherein mounting the stiffener includes forming an electrical connection between the stiffener and the substrate.

3. The method as claimed in claim 1 wherein forming the encapsulation includes forming an encapsulation inner sidewall over the stiffener, the encapsulation having a continuous, non-vertical surface around the stiffener opening.

4. The method as claimed in claim 1 wherein:

mounting the stiffener includes providing a mold dam; and

molding the encapsulation includes prohibiting the encapsulation to be formed beyond the stiffener functioning as the mold dam.

5. The method as claimed in claim 1 wherein attaching the lid plate includes mounting the lid plate on the inner upper periphery surface of the stiffener with a lid adhesive, the lid adhesive electrically conductive for forming an electromagnetic shield.

6. A method of manufacture of an integrated circuit packaging system comprising:

providing a substrate;

mounting a stiffener having a stiffener opening completely through the stiffener on the substrate;

mounting a vertical interconnector on the substrate;

molding an encapsulation directly on the substrate, a portion of the vertical interconnector, and an outer upper periphery surface, the encapsulation exposing an inner upper periphery surface of the stiffener, the encapsulation exposing a portion of the substrate;

mounting an integrated circuit over the substrate and within the perimeter of the stiffener; and

attaching a lid plate on the inner upper periphery surface of the stiffener and over the integrated circuit, the lid plate extending above an encapsulation top side.

7. The method as claimed in claim 6 wherein forming the encapsulation includes:

positioning the top mold chase over the stiffener and directly on the inner upper periphery surface of the stiffener; and

molding the encapsulation for forming an encapsulation inner sidewall directly on the top mold chase.

8. The method as claimed in claim 6 wherein attaching the lid plate includes attaching the lid plate having optical transparency over the integrated circuit with a vertical gap between the lid plate and the integrated circuit.

9. The method as claimed in claim 6 wherein attaching the lid plate includes attaching the lid plate to the integrated circuit with a lid adhesive and the lid adhesive is thermally conductive for dissipating heat.

10. The method as claimed in claim 6 wherein mounting the integrated circuit includes mounting the integrated circuit within the perimeter of an encapsulation opening, the integrated circuit can include a flip chip die, a complementary metal oxide semiconductor imaging sensor chip, a wire-bond die, or a combination thereof.

11. An integrated circuit packaging system comprising:

a substrate;

a stiffener having a stiffener opening completely through the stiffener on the substrate;

an encapsulation directly on the substrate and an outer upper periphery surface of the stiffener, exposing an inner upper periphery surface of the stiffener;

an encapsulation inner sidewall over the outer upper periphery surface of the stiffener;

an integrated circuit over the substrate and within the perimeter of the stiffener; and

a lid plate on an inner upper periphery surface and over the integrated circuit, the lid plate extending above an encapsulant top side.

12. The system as claimed in claim 11 wherein the stiffener includes an electrical connection between the stiffener and the substrate.

13. The system as claimed in claim 11 wherein the encapsulation includes the encapsulation inner sidewall over the stiffener and the encapsulation having a continuous non-vertical surface around the stiffener opening.

14. The system as claimed in claim 11 wherein the encapsulation is directly on a mold dam.

15. The system as claimed in claim 11 wherein the lid plate is over the inner upper periphery surface and directly on the lid adhesive.

16. The system as claimed in claim 11 further comprising a vertical interconnector mounted on the substrate outside of the perimeter of the stiffener.

17. The system as claimed in claim 16 wherein the encapsulation includes the encapsulation inner sidewall facing a portion of the lid plate.

18. The system as claimed in claim 16 wherein the lid plate is optically transparent and separated from the integrated circuit by a vertical gap.

19. The system as claimed in claim 16 wherein the lid plate is directly on the lid adhesive, the lid adhesive is thermally conductive for dissipating heat from the integrated circuit.

20. The system as claimed in claim 16 wherein the integrated circuit is within the perimeter of the encapsulation opening and the integrated circuit can include a flip chip die, a complementary metal oxide semiconductor imaging sensor chip, a wire-bond die, or a combination thereof.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0235. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 065236/0741 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0235 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2011
From: CHI, HEEJO; CHO, NAMJU; SHIN, HANGIL
To: STATS CHIPPAC LTD.
Reel/Frame 026919/0466 →
Continuity (1)
Related Publication 20130056863A1 · Mar 7, 2013