Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die
View Patent ↗A semiconductor device has a base substrate with first and second opposing surfaces. A plurality of cavities and base leads between the cavities is formed in the first surface of the base substrate. The first set of base leads can have a different height or similar height as the second set of base leads. A concave capture pad can be formed over the second set of base leads. Alternatively, a plurality of openings can be formed in the base substrate and the semiconductor die mounted to the openings. A semiconductor die is mounted between a first set of the base leads and over a second set of the base leads. An encapsulant is deposited over the die and base substrate. A portion of the second surface of the base substrate is removed to separate the base leads. An interconnect structure is formed over the encapsulant and base leads.
1. A method of making a semiconductor device, comprising:
providing a base substrate;
removing a first portion of the base substrate to form a plurality of first base leads including a first height and a plurality of second base leads including a second height different from the first height, wherein the first height is greater than the second height;
providing a first semiconductor die including a plurality of electrical contact pads formed directly on a surface of the first semiconductor die;
disposing the first semiconductor die on the plurality of second base leads and between the first base leads with the second base leads contacting the electrical contact pads of the first semiconductor die;
removing a second portion of the base substrate to separate and electrically isolate the first and second base leads; and
forming an interconnect structure on the first and second base leads opposite the first semiconductor die.
2. The method of claim 1 , further including disposing a second semiconductor die over the first base leads.
3. The method of claim 2 , further including disposing the second semiconductor die between a plurality of third base leads.
4. The method of claim 1 , further including
disposing a second semiconductor die over the first semiconductor die.
5. The method of claim 1 , wherein the first base leads provide a vertical interconnect around the first semiconductor die.
6. The method of claim 1 , further including forming a concave capture pad over the second base leads.
7. A method of making a semiconductor device, comprising:
providing a base substrate including a plurality of first base leads comprising a first height and a plurality of second base leads comprising a second height different from the first height, wherein the first height is greater than the second height;
providing a first semiconductor die including a plurality of electrical contact pads formed directly on a surface of the first semiconductor die;
disposing the first semiconductor die on the plurality of second base leads with the second base leads coupled to the electrical contact pads of the first semiconductor die;
removing a portion of the base substrate to separate and electrically isolate the first and second base leads; and
forming an interconnect structure on the first and second base leads opposite the first semiconductor die.
8. The method of claim 7 , further including disposing the first semiconductor die between a plurality of second base leads.
9. The method of claim 7 , further including forming a concave capture pad over the first base leads.
10. The method of claim 7 , further including forming an insulating layer over the base substrate.
11. The method of claim 8 , further including:
disposing a second semiconductor die over the first semiconductor die; and
electrically connecting the second semiconductor die to the second base leads.
12. The method of claim 7 , further including
stacking a plurality of the semiconductor devices.
13. A method of making a semiconductor device, comprising:
providing a base substrate including a plurality of first base leads including a first height and a plurality of second base leads including a second height different from the first height, wherein the first height is greater than the second height;
providing a first semiconductor die including a plurality of electrical contact pads formed directly on a surface of the first semiconductor die;
disposing the first semiconductor die on the plurality of second base leads with the second base leads contacting the electrical contact pads of the first semiconductor die; and
removing a portion of the base substrate to separate and electrically isolate the first and second base leads.
14. The method of claim 13 , further including disposing the first semiconductor die between the first base leads.
15. The method of claim 13 , further including forming a concave capture pad over the second base leads.
16. The method of claim 13 , further including
forming an interconnect structure over the first and second base leads opposite
the first semiconductor die.
17. The method of claim 13 , further including
stacking a plurality of the semiconductor devices.
18. The method of claim 13 , further including disposing a second semiconductor die over the first semiconductor die.
19. The method of claim 13 , further including disposing a second semiconductor die over the second base leads and between a plurality of third base leads.
20. A method of making a semiconductor device, comprising:
providing a base substrate including a plurality of first base leads comprising a first height and a plurality of second base leads comprising a second height different from the first height, wherein the first height is greater than the second height;
providing a first semiconductor die including a plurality of electrical contact pads formed directly on a surface of the first semiconductor die;
disposing the first semiconductor die on the plurality of second base leads and between the first base leads with the second base leads coupled to the electrical contact pads of the first semiconductor die;
removing a portion of the base substrate to separate and electrically isolate the first and second base leads; and
forming an interconnect structure on the second base leads opposite the first semiconductor die.
21. The method of claim 20 , further including forming a concave capture pad over the base leads.
22. The method of claim 20 , further including disposing a second semiconductor die over the first semiconductor die.
23. The method of claim 20 , further including disposing the first semiconductor die over a first set of the base leads and between a second set of the base leads.