IP Library Assignment 038378/0360
Patent Assignment
Reel/Frame 038378/0360

CHANGE OF NAME

Recorded: 2016-04-07 Received: 2016-04-07 Pages: 8
Assignor
STATS CHIPPAC LTD.
Executed: 2016-03-29
Assignee
STATS CHIPPAC PTE. LTE.
5 YISHUN STREET 23, SINGAPORE, SGX, SINGAPORE
Covered Applications (59)
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
App. No. 14/274,599
Semiconductor Device and Method of Forming Vertical Interconnect Structure with Conductive Micro Via Array for 3-D FO-WLCSP
App. No. 14/043,751
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
App. No. 14/020,996
Semiconductor Device and Method of Forming Interconnect Structure Over Seed Layer on Contact Pad of Semiconductor Die Without Undercutting Seed Layer Beneath Interconnect Structure
App. No. 14/021,056
Semiconductor Device and Method of Forming Bump-on-Lead Interconnection
App. No. 14/021,914
SEMICONDUCTOR DEVICE WITH BUMP FORMED ON SUBSTRATE TO PREVENT ELK ILD DELAMINATION DURING REFLOW PROCESS
App. No. 13/906,844
Semiconductor Device and Method of Forming Partially-Etched Conductive Layer Recessed Within Substrate for Bonding to Semiconductor Die
App. No. 13/896,635
METHOD OF FORMING RDL WIDER THAN CONTACT PAD ALONG FIRST AXIS AND NARROWER THAN CONTACT PAD ALONG SECOND
App. No. 13/893,616
Semiconductor Device and Method of Forming Interposer and Opposing Build-Up Interconnect Structure with Connecting Conductive TMV for Electrical Interconnect of FO-WLCSP
App. No. 13/887,180
Semiconductor Device and Method of Forming Vertically Offset Conductive Pillars Over First Substrate Aligned to Vertically Offset BOT Interconnect Sites Formed Over Second Substrate
App. No. 13/870,928
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PROTECTIVE COATING OVER INTERCONNECT STRUCTURE TO INHIBIT SURFACE OXIDATION
App. No. 13/846,742
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER DISPOSED OVER THE SEMICONDUCTOR DIE FOR STRESS RELIEF
App. No. 13/782,618
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PRE-MOLDED SUBSTRATE TO REDUCE WARPAGE DURING DIE MOLDING
App. No. 13/769,302
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE WITH CONDUCTIVE PADS HAVING EXPANDED INTERCONNECT SURFACE AREA FOR ENHANCED INTERCONNECTION PROPERTIES
App. No. 13/768,862
LEADFRAME INTERPOSER OVER SEMICONDUCTOR DIE AND TSV SUBSTRATE FOR VERTICAL ELECTRICAL INTERCONNECT
App. No. 13/766,646
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INSULATING LAYER AROUND SEMICONDUCTOR DIE
App. No. 13/766,493
SEMICONDUCTOR DEVICE AND METHOD OF FORMING ADJACENT CHANNEL AND DAM MATERIAL AROUND DIE ATTACH AREA OF SUBSTRATE TO CONTROL OUTWARD FLOW OF UNDERFILL MATERIAL
App. No. 13/760,187
Semiconductor Device and Method of Forming EWLB Package Containing Stacked Semiconductor Die Electrically Connected through Conductive Vias Formed in Encapsulant Around Die
App. No. 13/732,150
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERPOSER FRAME ELECTRICALLY CONNECTED TO EMBEDDED SEMICONDUCTOR DIE
App. No. 13/714,061
Semiconductor Device and Method of Forming Conductive TSV With Insulating Annular Ring
App. No. 13/691,578
SEMICONDUCTOR DEVICE INCLUDING BUMP FORMED ON SUBSTRATE TO PREVENT EXTRIMELY-LOW DIELECTRIC CONSTANT (ELK) INTERLAYER DIELECTRIC LAYER (ILD) DELAMINATION DURING REFLOW PROCESS
App. No. 13/691,427
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE POSTS AND HEAT SINK OVER SEMICONDUCTOR DIE USING LEADFRAME
App. No. 13/683,946
SEMICONDUCTOR DEVICE AND METHOD OF FORMING DIFFERENT HEIGHT CONDUCTIVE PILLARS TO ELECTRICALLY INTERCONNECT STACKED LATERALLY OFFSET SEMICONDUCTOR DIE
App. No. 13/684,055
SEMICONDUCTOR DEVICE AND METHOD OF FORMING REPASSIVATION LAYER WITH REDUCED OPENING TO CONTACT PAD OF SEMICONDUCTOR DIE
App. No. 13/664,626
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PARTIALLY-ETCHED CONDUCTIVE LAYER RECESSED WITHIN SUBSTRATE FOR BONDING TO SEMICONDUCTOR DIE
App. No. 13/606,631
MEDICAL DEVICE WITH INTERACTIVE CONTROL PANEL
App. No. 13/589,906
Semiconductor Device and Method of Forming RF Balun having Reduced Capacitive Coupling and High CMRR
App. No. 13/571,068
Semiconductor Device and Method of Forming WLCSP Structure using Protruded MLP
App. No. 13/570,979
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SHIELDING LAYER OVER SEMICONDUCTOR DIE MOUNTED TO TSV INTERPOSER
App. No. 13/571,020
Semiconductor Device and Method of Forming Discontinuous ESD Protection Layers Between Semiconductor Die
App. No. 13/560,008
SEMICONDUCTOR DEVICE AND METHOD OF EMBEDDING BUMPS FORMED ON SEMICONDUCTOR DIE INTO PENETRABLE ADHESIVE LAYER TO REDUCE DIE SHIFTING DURING ENCAPSULATION
App. No. 13/536,177
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THERMALLY CONDUCTIVE LAYER BETWEEN SEMICONDUCTOR DIE AND BUILD-UP INTERCONNECT STRUCTURE
App. No. 13/492,687
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
App. No. 13/458,289
Semiconductor Device and Method of Forming Sacrificial Protective Layer to Protect Semiconductor Die Edge During Singulation
App. No. 13/446,664
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STUD BUMPS OVER EMBEDDED DIE
App. No. 13/441,691
Semiconductor Device and Method of Forming Column Interconnect Structure to Reduce Wafer Stress
App. No. 13/438,402
Semiconductor Device and Method of Forming Shielding Layer Around Back Surface and Sides of Semiconductor Wafer Containing IPD Structure
App. No. 13/438,463
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE
App. No. 13/423,832
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OPEN CAVITY IN TSV INTERPOSER TO CONTAIN SEMICONDUCTOR DIE IN WLCSMP
App. No. 13/420,400
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED EMI SHIELDING FRAME WITH CAVITIES CONTAINING PENETRABLE MATERIAL OVER SEMICONDUCTOR DIE
App. No. 13/349,829
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED EMI SHIELDING FRAME WITH CAVITIES CONTAINING PENETRABLE MATERIAL OVER SEMICONDUCTOR DIE
App. No. 13/349,919
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED INTERCONNECT LAYER FOR STACKED SEMICONDUCTOR DIE
App. No. 13/350,299
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED INTERCONNECT LAYER FOR STACKED SEMICONDUCTOR DIE
App. No. 13/349,510
Semiconductor Device and Method of Forming WLP With Semiconductor Die Embedded Within Penetrable Encapsulant Between TSV Interposers
App. No. 13/284,003
SEMICONDUCTOR DEVICE AND METHOD OF FORMING WAFER-LEVEL MULTI-ROW ETCHED LEADFRAME WITH BASE LEADS AND EMBEDDED SEMICONDUCTOR DIE
App. No. 13/284,811
SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON DIFFERENT HEIGHT TRACES
App. No. 13/268,091
Semiconductor Device and Method of Forming Compliant Stress Relief Buffer Around Large Array WLCSP
App. No. 13/231,789
Semiconductor Device and Method of Forming Dam Material Around Periphery of Die to Reduce Warpage
App. No. 13/223,478
SEMICONDUCTOR PACKAGE AND METHOD OF MOUNTING SEMICONDUCTOR DIE TO OPPOSITE SIDES OF TSV SUBSTRATE
App. No. 13/191,386
SEMICONDUCTOR DEVICE AND METHOD OF MOUNTING SEMICONDUCTOR DIE TO HEAT SPREADER ON TEMPORARY CARRIER AND FORMING POLYMER LAYER AND CONDUCTIVE LAYER OVER THE DIE
App. No. 13/190,339
REMOTE CONTROL WITH INTEGRATED POSITION, VIEWER IDENTIFICATION AND OPTICAL AND AUDIO TEST
App. No. 12/982,102
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FOLDABLE SUBSTRATE AND METHOD OF MANUFACTURE THEREOF
App. No. 12/948,756
LEADFRAME PACKAGE FOR MEMS MICROPHONE ASSEMBLY
App. No. 12/474,131
TESTING OF BGA AND OTHER CSP PACKAGES USING PROBING TECHNIQUES
App. No. 10/140,572
SEMICONDUCTOR PACKAGE HAVING HEAT SINK ATTACHED TO PRE-MOLDED CAVITIES AND METHOD FOR CREATING THE PACKAGE
App. No. 10/116,983
DIE PADDLE ENHANCEMENT FOR EXPOSED PAD IN SEMICONDUCTOR PACKAGING
App. No. 09/920,599
FLIP CHIP THERMALLY ENHANCED BALL GRID ARRAY
App. No. 09/877,324
SUPER THIN/SUPER THERMAL BALL GRID ARRAY PACKAGE
App. No. 09/867,095
ENHANCED BGA GROUNDED HEATSINK
App. No. 09/849,671