IP Library Granted Patent US 8,921,161
Granted Patent B2
US 8,921,161 · App. 13/732,150 · Granted Dec 30, 2014

Semiconductor device and method of forming EWLB package containing stacked semiconductor die electrically connected through conductive vias formed in encapsulant around die

Inventor: Zigmund R. Camacho (Singapore, SG)
Assignee: STATS ChipPAC, Ltd.
H01L21/56H01L2224/821H01L23/3128H01L2924/01049H01L25/0657H01L2224/24011H01L24/25H01L2924/01079H01L2924/01082H01L24/24H01L21/561H01L2224/12105H01L2924/01047H01L2224/82039H01L2224/48091H01L23/49827H01L2224/24105H01L24/92H01L24/82H01L2924/13091H01L2224/32145H01L2924/014H01L2924/01073H01L2924/01074H01L2224/04105H01L24/96H01L2224/73267H01L2224/82031H01L2924/01029H01L2224/131H01L2225/1035H01L24/97H01L2224/16225H01L24/19H01L2224/96H01L2224/92244H01L2924/01322H01L2924/15311H01L21/565H01L2224/24146H01L2924/01013H01L2224/73265H01L2224/245
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Quick Facts
Patent No.
US 8,921,161
App. No.
13/732,150
Granted
Dec 30, 2014
Kind
B2
Abstract

A semiconductor device has a first semiconductor die and first encapsulant deposited around the first semiconductor die. A first insulating layer is formed over the first semiconductor die and first encapsulant. A first conductive layer is formed over the first insulating layer and electrically connected to a contact pad of the first semiconductor die. A second semiconductor die is mounted to the first insulating layer and first conductive layer. A second encapsulant is deposited around the second semiconductor die. A second insulating layer is formed over the second semiconductor die and second encapsulant. A second conductive layer is formed over the second insulating layer and electrically connected to a contact pad of the second semiconductor die. A plurality of conductive vias is formed continuously through the first and second encapsulants outside a footprint of the first and second semiconductor die electrically connected to the first and second conductive layers.

Claims (79)

1. A method of making a semiconductor device, comprising:

providing a first semiconductor die including a contact pad formed on a surface of the first semiconductor die;

depositing a first encapsulant over the first semiconductor die while leaving the surface of the first semiconductor die devoid of the first encapsulant;

forming a first conductive layer over the first encapsulant and extending to the contact pad of the first semiconductor die;

providing a second semiconductor die including a contact pad formed on a surface of the second semiconductor die;

disposing the second semiconductor die over the first semiconductor die;

depositing a second encapsulant over the first encapsulant and second semiconductor die after disposing the second semiconductor die over the first semiconductor die while leaving the surface of the second semiconductor die devoid of the second encapsulant; and

forming a second conductive layer over the second encapsulant and extending to the contact pad of the second semiconductor die.

2. The method of claim 1 , further including forming a conductive via through the first encapsulant and second encapsulant and electrically connected to the first conductive layer and second conductive layer.

3. The method of claim 2 , further including:

stacking a plurality of semiconductor devices; and

electrically connecting the stacked semiconductor devices through the conductive via.

4. The method of claim 1 , further including:

disposing a third semiconductor die over the second semiconductor die;

depositing a third encapsulant over the third semiconductor die; and

forming a third conductive layer over the third encapsulant.

5. The method of claim 1 , further including forming an interconnect structure over the first semiconductor die or second semiconductor die.

6. The method of claim 1 , wherein the first encapsulant includes a thickness different from a thickness of the second encapsulant.

7. A method of making a semiconductor device, comprising:

providing a first semiconductor die including a contact pad formed on a surface of the first semiconductor die;

depositing a first encapsulant over the first semiconductor die and planar with the surface of the first semiconductor die;

forming a first conductive layer over the first encapsulant;

disposing a second semiconductor die over the first semiconductor die;

depositing a second encapsulant over the second semiconductor die and over the first encapsulant after disposing the second semiconductor die over the first semiconductor die;

forming a second conductive layer over the second encapsulant; and

forming a conductive via through the first encapsulant, first conductive layer, second conductive layer, and second encapsulant.

8. The method of claim 7 , further including:

disposing a third semiconductor die over the second semiconductor die;

depositing a third encapsulant over the third semiconductor die;

forming a third conductive layer over the third encapsulant; and

forming the conductive via through the first conductive layer, second conductive layer, and third conductive layer.

9. The method of claim 7 , further including forming an interconnect structure over the first semiconductor die or second semiconductor die.

10. The method of claim 7 , further including:

stacking a plurality of semiconductor devices; and

electrically connecting the stacked semiconductor devices through the conductive via.

11. The method of claim 7 , further including:

forming a contact pad on a surface of the second semiconductor die; and

depositing the second encapsulant over the second semiconductor die while blocking formation of the second encapsulant over the surface of the second semiconductor die.

12. A semiconductor device, comprising:

a first semiconductor die;

a first encapsulant deposited over the first semiconductor die;

a first conductive layer formed over the first encapsulant;

a second semiconductor die including a contact pad formed on a surface of the second semiconductor die, wherein the second semiconductor die is disposed over the first semiconductor die;

a second encapsulant deposited in direct contact with the first conductive layer and over the second semiconductor die leaving the surface of the second semiconductor die devoid of the second encapsulant; and

a second conductive layer formed over the second encapsulant and extending to the contact pad of the second semiconductor die.

13. The semiconductor device of claim 12 , further including a conductive via formed through the first encapsulant and second encapsulant and electrically connected to the first conductive layer and second conductive layer.

14. The semiconductor device of claim 13 , further including a plurality of stacked semiconductor devices electrically connected through the conductive via.

15. The semiconductor device of claim 12 , further including:

a third semiconductor die disposed over the second semiconductor die;

a third encapsulant deposited over the third semiconductor die; and

a third conductive layer formed over the third encapsulant and electrically connected to the third semiconductor die.

16. The semiconductor device of claim 12 , further including an interconnect structure formed over the first semiconductor die or second semiconductor die.

17. The semiconductor device of claim 12 , wherein the first encapsulant includes a thickness different from a thickness of the second encapsulant.

18. A method of making a semiconductor device, comprising:

providing a first semiconductor die;

depositing a first encapsulant over the first semiconductor;

providing a second semiconductor die including a contact pad formed on a surface of the second semiconductor die;

disposing the second semiconductor die over the first semiconductor die;

depositing a second encapsulant over the second semiconductor die after disposing the second semiconductor die over the first semiconductor die leaving the surface of the second semiconductor dies devoid of the second encapsulant; and

forming a conductive layer over the second encapsulant and extending to a contact pad of the second semiconductor die.

19. The method of claim 18 , further including forming a conductive via through the first encapsulant and second encapsulant and electrically connected to the conductive layer.

20. The method of claim 19 , further including:

stacking a plurality of semiconductor devices; and

electrically connecting the stacked semiconductor devices through the conductive via.

21. The method of claim 18 , further including forming an interconnect structure over the first semiconductor die or second semiconductor die.

22. The method of claim 18 , further including:

forming a contact pad on a surface of the first semiconductor die; and

depositing the first encapsulant over the first semiconductor die while blocking formation of the first encapsulant over the surface of the first semiconductor die.

23. A method of making a semiconductor device, comprising:

providing a first semiconductor die;

depositing a first encapsulant over the first semiconductor;

disposing a second semiconductor die over the first semiconductor die; and

depositing a second encapsulant over the second semiconductor die after disposing the second semiconductor die over the first semiconductor die.

24. The method of claim 23 , further including forming a conductive layer over the second encapsulant.

25. The method of claim 23 , further including forming a conductive via through the first encapsulant and second encapsulant.

26. The method of claim 25 , further including:

stacking a plurality of semiconductor devices; and

electrically connecting the stacked semiconductor devices through the conductive via.

27. The method of claim 23 , further including forming an interconnect structure over the first semiconductor die or second semiconductor die.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME ON COVERSHEET FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED ON REEL 038378 FRAME 0418. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF NAME. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064908/0920 →
CORRECTIVE ASSIGNMENT TO CORRECT THE SPELLING OF THE ASSIGNEE'S NAME ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0161. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064805/0735 →
RELEASE OF SECURITY INTEREST Recorded Jun 17, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 053511/0298 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
RELEASE OF SECURITY INTEREST Recorded Dec 13, 2019
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 051285/0318 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0360 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0161 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0418 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (2)
Continuation 13116328 · May 26, 2011
Related Publication 20130119559A1 · May 16, 2013