IP Library Granted Patent US 8,901,734
Granted Patent B2
US 8,901,734 · App. 13/438,402 · Granted Dec 2, 2014

Semiconductor device and method of forming column interconnect structure to reduce wafer stress

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Quick Facts
Patent No.
US 8,901,734
App. No.
13/438,402
Granted
Dec 2, 2014
Kind
B2
Abstract

An interconnect pad is formed over a first substrate. A photoresist layer is formed over the first substrate and interconnect pad. A portion of the photoresist layer is removed to form a channel and expose a perimeter of the interconnect pad while leaving the photoresist layer covering a central area of the interconnect pad. A first conductive material is deposited in the channel of the photoresist layer to form a column of conductive material. The remainder of the photoresist layer is removed. A masking layer is formed around the column of conductive material while exposing the interconnect pad within the column of conductive material. A second conductive material is deposited over the first conductive layer. The second conductive material extends above the column of conductive material. The masking layer is removed. The second conductive material is reflowed to form a column interconnect structure over the semiconductor device.

Claims (36)

1. A semiconductor device, comprising:

a first substrate;

a first conductive layer formed over the first substrate;

a column of first conductive material formed over the first conductive layer; and

a second conductive material extending from the first conductive layer and surrounded by the column of first conductive material as a column interconnect structure.

2. The semiconductor device of claim 1 , wherein the column of first conductive material is circular or rectangular.

3. The semiconductor device of claim 1 , wherein the column of first conductive material includes copper.

4. The semiconductor device of claim 1 , wherein the second conductive material includes solder.

5. The semiconductor device of claim 1 , wherein the second conductive material is formed as a bump over the column of first conductive material.

6. The semiconductor device of claim 1 , further including:

a second substrate; and

a second conductive layer disposed over the second substrate, wherein the first substrate is mounted to the second substrate with the column interconnect structure electrically connected to the second conductive layer.

7. The semiconductor device of claim 1 , wherein the second conductive material disposed within the column of first conductive material provides stress relief for the column interconnect structure.

8. A semiconductor device, comprising:

a first substrate;

a first conductive layer formed over the first substrate;

a first conductive material formed over the first conductive layer; and

a second conductive material extending from the first conductive layer and surrounded by the first conductive material as an interconnect structure.

9. The semiconductor device of claim 8 , wherein the second conductive material extends above a column of the first conductive material.

10. The semiconductor device of claim 9 , wherein the second conductive material includes a rounded shape extending above the column of first conductive material.

11. The semiconductor device of claim 9 , wherein the column of first conductive material is circular or rectangular.

12. The semiconductor device of claim 9 , wherein the column of first conductive material includes copper.

13. The semiconductor device of claim 8 , wherein the second conductive material includes solder.

14. The semiconductor device of claim 8 , further including:

a second substrate; and

a second conductive layer disposed over the second substrate, wherein the first substrate is mounted to the second substrate with the interconnect structure electrically connected to the second conductive layer.

15. A semiconductor device, comprising:

a first substrate;

a column of first conductive material extending from a surface of the first substrate; and

a second conductive material extending through the column of first conductive material as a column interconnect structure.

16. The semiconductor device of claim 15 , wherein the second conductive material extends above the column of first conductive material.

17. The semiconductor device of claim 15 , wherein the column of first conductive material is circular or rectangular.

18. The semiconductor device of claim 15 , wherein the column of first conductive material includes copper.

19. The semiconductor device of claim 15 , further including:

a second substrate; and

a second conductive layer disposed over the second substrate, wherein the first substrate is mounted to the second substrate with the column interconnect structure electrically connected to the second conductive layer.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE SPELLING OF THE ASSIGNEE'S NAME ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0161. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064805/0735 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052844/0491 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0161 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0360 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →