Apparatuses, device, and methods for cleaning tester interface contact elements and support hardware
View Patent ↗A method for predictably cleaning the contact elements and support hardware of a tester interface, such as a probe card and a test socket, while it is still in manual, semi-automated, and automated handling device and the electrical test equipment is disclosed. In the method, a cleaning device is loaded into wafer prober or packaged device handler and the pin contact elements and support hardware are contacted by the cleaning device.
1. A method for cleaning one or more pin contact elements and support hardware in a semiconductor testing apparatus, the method comprising:
loading a cleaning device, into the semiconductor testing apparatus that has one or more pin contact elements and support hardware, the cleaning device having a same physical configuration as IC semiconductor devices tested by the semiconductor testing apparatus, the cleaning device having a top surface with predetermined properties that clean the one or more pin contact elements, and one or more intermediate layers underneath the top surface, the one or more intermediate layers having a set of predetermined characteristics that are selected to optimize the cleaning device for one or more pin contact elements and support structures of testing interfaces, wherein the one or more intermediate layers have a modulus of elasticity range between more than 40-MPa to 600-MPa, each layer has a thickness between 25-um and 300-um and each layer has a hardness between 30 Shore A and 90 Shore A; and
contacting the one or more pin contact elements and support hardware with the cleaning device during a normal testing operation of the semiconductor testing apparatus so that any debris is removed from the one or more pin contact elements and support hardware.
2. The method of claim 1 , wherein the cleaning further comprises periodically loading one or more cleaning devices into the semiconductor testing apparatus when the one or more pin contact elements and support hardware are being cleaned.
3. The method of claim 1 , wherein the loading further comprises loading one or more cleaning devices into one or more device carriers, along with semiconductor wafers having dies being tested by the semiconductor testing apparatus so that the one or more cleaning devices are contacted during a testing process of the devices.
4. The method of claim 1 further comprising maintaining the one or more pin contact elements and support hardware in a cleaned state for a longer period of time increasing yield performance and increasing an amount of revenue for a manufacturer.
5. The method of claim 1 , wherein the cleaning device properties are selected for any given probe element material or shape to remove embedded or bonded debris from pin contact elements and support hardware reducing the amount of downtime needed for manual cleaning, increasing a testing throughput for a manufacturer.
6. The method of claim 1 , wherein loading the cleaning device into the semiconductor testing apparatus further comprises loading the cleaning device into one of a wafer prober and a packaged device handler.
7. The method of claim 3 , wherein loading the one or more cleaning devices into one or more device carriers further comprises loading the one or more cleaning devices into one of a wafer cassette and a JEDEC tray.
8. The method of claim 1 further comprising testing, using the semiconductor testing apparatus, a plurality of devices.
9. The method of claim 8 , wherein testing the plurality of devices further comprises testing, using the semiconductor testing apparatus, one of an individual semiconductor die and a packaged semiconductor device.
10. The method of claim 5 , wherein selecting the cleaning device properties further comprises selecting one of a density of the cleaning device top surface and an abrasiveness of the cleaning device top surface.