IP Library Granted Patent US 8,929,110
Granted Patent B2
US 8,929,110 · App. 13/331,411 · Granted Jan 6, 2015

Pulse width modulation controller architectures

Inventor: Karl Jean-Paul Courtel (Reze, FR)
Assignee: Atmel Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,929,110
App. No.
13/331,411
Granted
Jan 6, 2015
Kind
B2
Abstract

Systems, apparatuses, and techniques for pulse width modulation (PWM) are described. A described system includes a circuit that contains an inductor and a transistor that controls current through the inductor based on a PWM signal to produce an output; and a controller to provide the PWM signal, which includes PWM cycles that include on-durations and off-durations. The controller can receive a first signal indicating an input voltage that is applied to the inductor, receive a second signal indicating a current through the inductor, use an on-duration parameter value to control the on-duration, determine a maximum off-duration of the off-durations corresponding to the PWM cycles occurring within a first voltage cycle, the first voltage cycle being defined between two consecutive zero-crossing events as indicated by the first signal, and adjust the on-duration parameter value for a second, subsequent voltage cycle based on the maximum off-duration to regulate the output voltage.

Claims (64)

1. An apparatus comprising:

a first input interface to receive a first signal indicating a zero detection of an input voltage that is applied to an inductor of a circuit, the circuit being configured to produce an output signal with an output voltage;

a second input interface to receive a second signal indicating a zero detection of a current through the inductor;

circuitry to provide a pulse width modulation (PWM) signal that controls, via a switch, the current through the inductor based on an on-duration parameter value, the PWM signal comprising PWM cycles that each comprise an on-duration and an off-duration, wherein the on-duration parameter value controls an on-state duration of the switch, and wherein a start of each on-duration is triggered by a current trigger event indicated by the second signal;

circuitry to determine a maximum off-duration of the off-durations corresponding to the PWM cycles occurring within a first voltage cycle, the first voltage cycle being defined between two consecutive zero-crossing events as indicated by the first signal; and

circuitry to adjust the on-duration parameter value for a second, subsequent voltage cycle based on the maximum off-duration to regulate the output voltage.

2. The apparatus of claim 1 , further comprising:

timer circuitry that includes a timer counter;

circuitry to capture a value of the timer counter based on the current trigger event; and

circuitry to reset the timer counter based on the current trigger event.

3. The apparatus of claim 2 , further comprising:

a register;

circuitry to perform a comparison between a value of the register and the value of the timer counter; and

circuitry to load the register with the value of the timer.

4. The apparatus of claim 1 , wherein the circuitry to adjust the on-duration parameter value is configured to adjust the on-duration parameter value further based on a maximum time that the inductor takes to demagnetize into a half period of input power during the first voltage cycle.

5. The apparatus of claim 1 , wherein the circuitry to determine the maximum off-duration comprises circuitry to capture a maximum PWM cycle duration that occurs during the first voltage cycle, wherein the maximum off-duration is determined based on the maximum PWM cycle duration and the on-duration parameter value in use during the maximum PWM cycle duration.

6. The apparatus of claim 1 , wherein the input voltage is supplied by an alternating current source, and wherein the circuitry to adjust the on-duration parameter value is programmed with a maximal voltage value associated with the alternating current source.

7. A system comprising:

a circuit comprising an inductor and a transistor that controls current through the inductor based on a pulse width modulation (PWM) signal, the circuit being configured to produce an output signal with an output voltage; and

a controller configured to provide the PWM signal, the PWM signal comprising PWM cycles that each comprise an on-duration and an off-duration, wherein the controller is configured to:

receive a first signal indicating an input voltage that is applied to the inductor,

receive a second signal indicating the current through the inductor, use an on-duration parameter value to control each on-duration,

cause a start of each on-duration based on a current trigger event indicated by the second signal,

determine a maximum off-duration of the off-durations corresponding to the PWM cycles occurring within a first voltage cycle, the first voltage cycle being defined between two consecutive zero-crossing events as indicated by the first signal, and

adjust the on-duration parameter value for a second, subsequent voltage cycle based on the maximum off-duration to regulate the output voltage.

8. The system of claim 7 , wherein the controller comprises:

timer circuitry that includes a timer counter;

circuitry to capture a value of the timer counter based on the current trigger event; and

circuitry to reset the timer counter based on the current trigger event.

9. The system of claim 8 , wherein the controller comprises:

a register;

circuitry to perform a comparison between a value of the register and the value of the timer counter; and

circuitry to load the register with the value of the timer counter.

10. The system of claim 7 , wherein the controller is configured to adjust the on-duration parameter value further based on a maximum time that the inductor takes to demagnetize into a half period of input power during the first voltage cycle.

11. The system of claim 7 , wherein the controller is configured to capture a maximum PWM cycle duration that occurs during the first voltage cycle, wherein the maximum off-duration is determined based on the maximum PWM cycle duration and the on-duration parameter value in use during the maximum PWM cycle duration.

12. The system of claim 7 , wherein the input voltage is supplied by an alternating current source, and wherein the controller is programmed with a maximal voltage value associated with the alternating current source.

13. A system comprising:

a circuit comprising an inductor and a transistor that controls current through the inductor based on a pulse width modulation (PWM) signal, the circuit being configured to produce an output signal with an output voltage;

a processor configured to provide an on-duration parameter value; and

a controller, communicatively coupled with the processor, configured to provide the PWM signal, the PWM signal comprising PWM cycles that each comprise an on-duration and an off-duration, wherein the controller is configured to receive a first signal indicating an input voltage that is applied to the inductor, receive a second signal indicating the current through the inductor, use the on-duration parameter value to control each on-duration, cause a start of each on-duration based on a current trigger event indicated by the second signal, determine a maximum off-duration of the off-durations corresponding to the PWM cycles occurring within a first voltage cycle, the first voltage cycle being defined between two consecutive zero-crossing events as indicated by the first signal, and

wherein the processor is configured to adjust the on-duration parameter value for a second, subsequent voltage cycle based on the maximum off-duration to regulate the output voltage.

14. The system of claim 13 , wherein the controller comprises:

timer circuitry that includes a timer counter;

circuitry to capture a value of the timer counter based on the current trigger event; and

circuitry to reset the timer counter based on the current trigger event.

15. The system of claim 14 , wherein the controller comprises:

a register;

circuitry to perform a comparison between a value of the register and the value of the timer counter; and

circuitry to load the register with the value of the timer counter.

16. The system of claim 13 , wherein the processor is configured to adjust the on-duration parameter value further based on a maximum time that the inductor takes to demagnetize into a half period of input power during the first voltage cycle.

17. The system of claim 13 , wherein the input voltage is supplied by an alternating current source, and wherein the processor is programmed with a maximal voltage value associated with the alternating current source.

18. A method comprising:

receiving a first signal indicating a zero detection of an input voltage that is applied to an inductor of a circuit, the circuit being configured to produce an output signal with an output voltage;

receiving a second signal indicating a zero detection of a current through the inductor;

providing a pulse width modulation (PWM) signal that controls the current through the inductor based on an on-duration parameter value, the PWM signal comprising PWM cycles that each comprise an on-duration and an off-duration, wherein the on-duration parameter value controls the on-duration, and wherein a start of each on-duration is triggered by a current trigger event indicated by the second signal;

determining a maximum off-duration of the off-durations corresponding to the PWM cycles occurring within a first voltage cycle, the first voltage cycle being defined between two consecutive zero-crossing events as indicated by the first signal; and

adjusting the on-duration parameter value for a second, subsequent voltage cycle based on the maximum off-duration to regulate the output voltage.

19. The method of claim 18 , further comprising:

operating a timer counter;

capturing a value of the timer counter based on the current trigger event; and

resetting the timer counter based on the current trigger event.

20. The method of claim 19 , further comprising:

performing a comparison between a value of a register and the value of the timer counter; and

loading the register with the value of the timer counter.

Assignments (16)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2013
From: ATMEL NANTES S.A.S.
To: ATMEL CORPORATION
Reel/Frame 030181/0767 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 13, 2012
From: COURTEL, KARL JEAN-PAUL
To: ATMEL NANTES S.A.S.
Reel/Frame 027696/0712 →
Continuity (1)
Related Publication 20130154602A1 · Jun 20, 2013