Method of fabricating a GaN P-i-N diode using implantation
View Patent ↗A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region.
1. A method for fabricating a III-nitride semiconductor device, the method comprising:
providing a III-nitride substrate of a first conductivity type and characterized by a first dopant concentration;
forming a first III-nitride epitaxial layer of the first conductivity type coupled to the III-nitride substrate, wherein the first III-nitride epitaxial layer is characterized by a second dopant concentration less than the first dopant concentration;
forming a second III-nitride epitaxial layer of a second conductivity type coupled to the first III-nitride epitaxial layer;
removing a portion of the second III-nitride epitaxial layer to expose a portion of the first III-nitride epitaxial layer;
implanting ions into an implanted region of the exposed portion of the first III-nitride epitaxial layer, the exposed portion of the first III-nitride epitaxial layer adjacent to a remaining portion of the second III-nitride epitaxial layer;
forming a first metal structure coupled to the remaining portion of the second III-nitride epitaxial layer; and
forming a second metal structure coupled to the III-nitride substrate;
wherein a charge density in the implanted region is substantially lower than a charge density in the first III-nitride epitaxial layer.
2. The method of claim 1 wherein the first III-nitride epitaxial layer comprises an n-type GaN epitaxial material.
3. The method of claim 1 wherein the a depth of the implanted region is between 0.1 μm and 1 μm.
4. The method of claim 1 wherein a width of the implanted region is 0.5 μm or greater.
5. The method of claim 1 wherein the implanting ions into the implanted region comprises using the first metal structure as a mask during implantation.
6. The method of claim 1 wherein:
a mask is used to remove the portion of the second III-nitride epitaxial layer; and
the mask is also used during implanting the ions into the implanted region.
7. The method of claim 1 wherein the III-nitride semiconductor device is characterized by a breakdown voltage of 600V or greater.
8. The method of claim 7 wherein a thickness of the first III-nitride epitaxial layer is between 1 μm and 100 μm.
9. The method of claim 1 further comprising forming a dielectric layer coupled to the implanted region, wherein the first metal structure is further coupled to at least a portion of the dielectric layer.
10. The method of claim 9 wherein the first metal structure is further coupled to a portion of the implanted region.
11. A method for fabricating a III-nitride P-i-N diode, the method comprising:
providing a III-nitride substrate of a first conductivity type and characterized by a first dopant concentration;
forming a first III-nitride epitaxial layer of the first conductivity type coupled to the III-nitride substrate, wherein the first III-nitride epitaxial layer is characterized by a second dopant concentration less than the first dopant concentration;
forming a second III-nitride epitaxial layer of a second conductivity type coupled to the first III-nitride epitaxial layer;
implanting ions into an implanted region comprising a first portion of the first III-nitride epitaxial layer and a first portion of the second III-nitride epitaxial layer, wherein a charge density in the implanted region is lower than a charge density in the first III-nitride epitaxial layer;
forming a first metal structure coupled to a second portion of the second III-nitride epitaxial layer, the first metal structure forming a first contact of the P-i-N diode; and
forming a second metal structure coupled to the III-nitride substrate, the second metal structure forming a second contact of the P-i-N diode.
12. The method of claim 11 wherein implanting ions into the implanted region reduces an electrical conductivity of the implanted region or reduces an active charge of the implanted region.
13. The method of claim 11 further comprising:
forming an insulating layer coupled to the implanted region;
wherein the first metal structure is further coupled to at least a portion of the insulating layer.
14. The method of claim 13 wherein the first metal structure is further coupled to a portion of the implanted region.
15. The method of claim 13 wherein a thickness of the insulating layer is between 0.1 μm and 2 μm.
16. The method of claim 15 wherein forming an insulating layer comprises epitaxial growth of a GaN layer, an aluminum nitride layer, or an aluminum gallium nitride layer.
17. The method of claim 16 wherein the GaN layer has a net dopant level ranging from about 1×10 14 cm −3 to 1×10 15 cm −3 .
18. The method of claim 11 wherein a breakdown voltage for the III-nitride semiconductor device is at least 600V.
19. The method of claim 11 wherein a thickness of the first III-nitride epitaxial layer is between 1 μm and 100 μm.