Fabrication of floating guard rings using selective regrowth
View Patent ↗A method for fabricating edge termination structures in gallium nitride (GaN) materials includes providing a n-type GaN substrate having a first surface and a second surface, forming an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate, and forming a growth mask coupled to the n-type GaN epitaxial layer. The method further includes patterning the growth mask to expose at least a portion of the n-type GaN epitaxial layer, and forming at least one p-type GaN epitaxial structure coupled to the at least a portion of the n-type GaN epitaxial layer. The at least one p-type GaN epitaxial structure comprises at least one portion of an edge termination structure. The method additionally includes forming a first metal structure electrically coupled to the second surface of the n-type GaN substrate.
1. A method for fabricating edge termination structures in gallium nitride (GaN) materials, the method comprising:
providing a n-type GaN substrate having a first surface and a second surface;
forming an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate;
forming a growth mask coupled to the n-type GaN epitaxial layer, wherein the growth mask comprises:
a layer of in-situ aluminum nitride (AlN) epitaxially coupled to the n-type GaN epitaxial layer, and
a layer of silicon dioxide (SiO 2 ) in physical contact with the layer of in-situ AlN;
patterning the growth mask to expose at least a portion of the n-type GaN epitaxial layer;
forming at least one p-type GaN epitaxial structure coupled to the at least a portion of the n-type GaN epitaxial layer, the at least one p-type GaN epitaxial structure comprising at least one portion of an edge termination structure; and
forming a first metal structure electrically coupled to the second surface of the n-type GaN substrate.
2. The method of claim 1 further including removing the growth mask.
3. The method of claim 1 wherein forming the at least one p-type GaN epitaxial structure includes forming a p-type device structure, the method further comprising forming a second metal structure electrically coupled to the p-type device structure.
4. The method of claim 3 wherein the second metal structure is further electrically coupled to the edge termination structure.
5. The method of claim 1 further comprising forming a second metal structure electrically coupled to the n-type GaN epitaxial layer to create a Schottky contact.
6. The method of claim 1 wherein the at least one edge termination structure circumscribes a device structure.
7. A method of fabricating a semiconductor device, the method comprising:
providing a III-nitride substrate of a first conductivity type characterized by a first dopant concentration;
forming a III-nitride epitaxial layer of the first conductivity type coupled to a first surface of the III-nitride substrate;
forming a growth mask coupled to the III-nitride epitaxial layer, wherein forming the growth mask comprises:
forming a layer of in-situ silicon nitride (SiN) in physical contact with the III-nitride epitaxial layer, and
forming a layer of silicon dioxide (SiO 2 ) in physical contact with the layer of in-situ SiN;
patterning the growth mask to expose at least one portion of the III-nitride epitaxial layer;
forming at least one edge termination structure of a second conductivity type coupled to the at least one portion of the III-nitride epitaxial layer, wherein the at least one edge termination structure comprises a III-nitride epitaxial structure; and
removing the growth mask.
8. The method of claim 7 further comprising:
forming a III-nitride epitaxial device structure coupled to the at least one portion of the III-nitride epitaxial layer; and
forming a metal structure coupled to the III-nitride epitaxial device structure.
9. The method of claim 8 wherein the III-nitride epitaxial device structure comprises a channel region and a source region of a vertical junction field-effect transistor (JFET), the method further comprising forming at least one gate region coupled to the channel region, the at least one gate region comprising a III-nitride epitaxial material of the second conductivity type.
10. The method of claim 7 wherein the at least one edge termination structure circumscribes a semiconductor device.
11. The method of claim 7 wherein the III-nitride epitaxial layer is characterized by a second dopant concentration less than the first dopant concentration.
12. The method of claim 7 wherein the forming at least one edge termination structure region comprises forming three or more edge termination structure regions with predetermined spaces between each of the three or more edge termination structure regions, wherein:
a first spacing of the predetermined spaces is located closer to a semiconductor device than a second spacing of the predetermined spaces; and
a width of the first spacing is smaller than a width of the second spacing.
13. The method of claim 7 further comprising forming a metal field plate coupled to at least a portion of an edge termination structure.
14. The method of claim 7 further comprising:
forming a dielectric layer coupled to at least a portion of an edge termination structure; and
forming a metal field plate coupled to the dielectric layer such that the dielectric layer is disposed between the at least a portion of the edge termination structure and the metal field plate.
15. A method of fabricating a Schottky barrier diode, the method comprising:
providing a III-nitride substrate of a first conductivity type characterized by a first dopant concentration;
forming a III-nitride epitaxial layer of the first conductivity type coupled to a first surface of the III-nitride substrate;
forming a growth mask coupled to the III-nitride epitaxial layer, wherein forming the growth mask comprises:
forming a layer of in-situ aluminum nitride (AlN) epitaxially coupled to the III-nitride epitaxial layer, and
forming a layer of silicon dioxide (SiO 2 ) in physical contact with the layer of in-situ AlN;
patterning the growth mask to expose a first portion of a surface of the III-nitride epitaxial layer;
forming at least one III-nitride epitaxial structure of a second conductivity type coupled to the first portion of the surface of the III-nitride epitaxial layer, the at least one III-nitride epitaxial structure configured to provide edge termination to the Schottky barrier diode;
removing the growth mask to expose a second portion of the surface of the III-nitride epitaxial layer; and
forming a first metal structure coupled to the second portion of the surface of the III-nitride epitaxial layer to create a Schottky contact.
16. The method of claim 15 wherein the first metal structure is further electrically coupled to the at least one III-nitride epitaxial structure.
17. The method of claim 15 further comprising forming a second metal structure coupled to the III-nitride substrate.
18. The method of claim 15 further comprising forming a metal field plate coupled to the at least one III-nitride epitaxial structure.
19. The method of claim 15 further comprising:
forming a dielectric layer coupled to the at least one III-nitride epitaxial structure; and
forming a metal field plate coupled to the dielectric layer such that the dielectric layer is disposed between the at least one III-nitride epitaxial structure and the metal field plate.