Granted Patent B2

US 8,542,037 · App. 13/355,749 · Granted Sep 24, 2013

Abstract

Claims (23)

1. A multi-level high-voltage pulse generator integrated circuit comprising:

a digital logic-level control interface circuit;

a pair of complementary MOSFETs controlled by the digital control interface circuit;

a pair of supply voltage rails, wherein one of the pair of supply voltage rails is connected to each of the pair of complementary MOSFETs;

a pair of Zener diodes, wherein one of the pair of Zener diodes is connected to each of the pair of complementary MOSFETs;

a pair of resistors, wherein one of the pair of resistors is connected in parallel with each of the pair of Zener diodes;

a pair of complementary voltage blocking-MOSFETs having predetermined gate bias voltages, wherein each of the pair complementary voltage blocking-MOSFETs is attached to a corresponding one pair of complementary MOSFETs.

2. A multi-level high voltage pulse generator integrated circuit comprising in accordance with claim 1 wherein the digital logic-level control interface circuit comprises a direct-coupling gate driver connected to each of the pair of complementary MOSFETs.

3. A multi-level high voltage pulse generator integrated circuit comprising in accordance with claim 1 wherein the pair of supply voltage rails are complementary voltage sources.

4. A multi-level high voltage pulse generator integrated circuit comprising in accordance with claim 1 wherein gate terminals of each of the pair of complementary voltage blocking-MOSFETs is connected to ground.

5. A multi-level high-voltage pulse generator integrated circuit comprising:

a digital logic-level control interface circuit;

at least one pair of complementary MOSFETs controlled by the digital control interface circuit;

at least one pair of supply voltage rails, wherein one of the at least one pair of supply voltage rails is connected to each of the at least one pair of complementary MOSFETs;

at least one pair of Zener diodes, wherein one of the at least one pair of Zener diodes is connected to each of the at least one pair of complementary MOSFETs;

at least one pair of resistors, wherein one of the at least one pair of resistors is connected in parallel with each of the at least one pair of Zener diodes;

at least one pair complementary voltage blocking-MOSFETs having predetermined gate bias voltages, wherein each of the at least one pair complementary voltage blocking-MOSFETs is attached to a corresponding one of the at least one pair of complementary MOSFETs.

6. A multi-level high voltage pulse generate integrated circuit comprising in accordance with claim 5 wherein a number of pairs of complementary MOSFETs is equal to a number of pairs of complementary voltage blocking-MOSFETs to generate an even number of multiple voltage levels.

7. A multi-level high voltage pulse generate integrated circuit comprising in accordance with claim 5 wherein a number of pairs of complementary MOSFETs is unequal to a number of pairs of complementary voltage blocking-MOSFETs to generate an odd number of multiple voltage levels.

8. A multi-level high voltage pulse generator integrated circuit comprising in accordance with claim 5 wherein the digital logic-level control interface circuit comprises direct-coupling gate drivers connected to each of the at least one pair of complementary MOSFETs.

9. A multi-level high voltage pulse generator integrated circuit comprising in accordance with claim 5 wherein the at least one pair of supply voltage rails are complementary voltage sources.

10. A multi-level high voltage pulse generator integrated circuit comprising in accordance with claim 5 wherein the at least one pair of supply voltage rails are shared limited number of complementary voltage sources.

11. A multi-level high voltage pulse generator integrated circuit comprising in accordance with claim 5 wherein gate terminals of each of the at least one pair of complementary voltage blocking-MOSFETs is connected to ground.

Assignments (17)