Differential amplifier with de-emphasis
View Patent ↗A programmable current driver provides de-emphasis capability. A number of identical transmitter slices, consisting of a unit current source and a unit differential pair, are connected in parallel to the termination resistors. As the transmitter slices are identical, the current density through the differential pairs are identical, and the VDS voltages across them (as well as the VDS voltages across the unit current sources) are the same, ensuring that the current through each slice is identical (within the limits of device matching). Biasing circuitry ensures that each unit current source sinks a current having a fixed proportion to the total current.
1. A differential amplifier comprising:
an output pair connected to a voltage source and generating a differential output; and
a plurality of blocks coupled in parallel to the differential output pair, each block comprising:
a programmable current source; and
a differential pair connected between respective nodes of the output pair and the current source;
an amplitude of the differential output being a function of a ratio of the blocks enabled under each of a plurality of polarities.
2. The differential amplifier of claim 1 , wherein the amplitude of the differential output is a function of a ratio of the blocks enabled under a first polarity to the blocks enabled under a second polarity.
3. The differential amplifier of claim 1 , wherein each of the plurality of blocks is configured to sink an identical current when enabled under a given polarity.
4. The differential amplifier of claim 1 , wherein the programmable current sources and differential pairs are identical among the at least two of the plurality of blocks.
5. The differential amplifier of claim 1 , wherein the programmable current sources and differential pairs are identical among the plurality of blocks.
6. The differential amplifier of claim 1 , wherein the programmable current source includes at least two transistors coupled in parallel, each of the transistors being enabled by a respective bias node.
7. The differential amplifier of claim 1 , wherein the differential pair includes at least two transistors, each of the transistors being enabled by one of a respective control signal and its complement.