IP Library Granted Patent US 8,633,063
Granted Patent B2
US 8,633,063 · App. 13/426,442 · Granted Jan 21, 2014

Integrated circuit packaging system with pad connection and method of manufacture thereof

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,633,063
App. No.
13/426,442
Granted
Jan 21, 2014
Kind
B2
Abstract

A method of manufacture of an integrated circuit packaging system includes: forming a peripheral lead having a peripheral lead bottom side, a peripheral lead top side, a peripheral lead non-horizontal side, a peripheral lead horizontal ridge, and a peripheral lead conductive plate, the peripheral lead horizontal ridge protruding from the peripheral lead non-horizontal side; forming a central lead adjacent to the peripheral lead; forming a first top distribution layer on the peripheral lead top side; connecting an integrated circuit to the first top distribution layer; applying an insulation layer directly on a bottom extent of the first top distribution layer and a peripheral lead ridge lower side of the peripheral lead horizontal ridge; and attaching a heatsink to the central lead under the integrated circuit.

Claims (25)

1. A method of manufacture of an integrated circuit packaging system comprising:

forming a peripheral lead having a peripheral lead bottom side, a peripheral lead top side, a peripheral lead non-horizontal side, a peripheral lead horizontal ridge, and a peripheral lead conductive plate, the peripheral lead horizontal ridge protruding from the peripheral lead non-horizontal side;

forming a central lead adjacent to the peripheral lead;

forming a first top distribution layer on the peripheral lead top side;

connecting an integrated circuit to the first top distribution layer;

applying an insulation layer directly on a bottom extent of the first top distribution layer and a peripheral lead ridge lower side of the peripheral lead horizontal ridge; and

attaching a heatsink to the central lead under the integrated circuit.

2. The method as claimed in claim 1 wherein forming the peripheral lead includes forming the peripheral lead having the peripheral lead conductive plate with a recess at the peripheral lead bottom side.

3. The method as claimed in claim 1 further comprising forming a central top distribution layer directly on the central lead.

4. The method as claimed in claim 1 wherein forming the peripheral lead includes forming the peripheral lead having a peripheral lead step portion protruding from the peripheral lead top side.

5. The method as claimed in claim 1 wherein forming the central lead includes forming the central lead directly under the integrated circuit.

6. A method of manufacture of an integrated circuit packaging system comprising:

forming a peripheral lead having a peripheral lead bottom side, a peripheral lead top side, a peripheral lead non-horizontal side, a peripheral lead horizontal ridge, and a peripheral lead conductive plate, the peripheral lead horizontal ridge protruding from the peripheral lead non-horizontal side;

forming a central lead adjacent to the peripheral lead;

forming a first top distribution layer on the peripheral lead top side;

connecting an integrated circuit to the first top distribution layer;

forming an encapsulation on the integrated circuit and the first top distribution layer;

applying an insulation layer directly on a bottom extent of the first top distribution layer and a peripheral lead ridge lower side of the peripheral lead horizontal ridge; and

attaching a heatsink to the central lead under the integrated circuit.

7. The method as claimed in claim 6 wherein attaching the heatsink to the central lead includes attaching the heatsink having a cavity within a raised center portion of the heatsink.

8. The method as claimed in claim 6 wherein attaching the heatsink to the central lead includes attaching the heatsink having a fully flat bottom surface.

9. The method as claimed in claim 6 wherein:

forming the peripheral lead includes forming the peripheral lead having a peripheral lead step portion protruding from the peripheral lead top side; and

forming the first top distribution layer includes forming the first top distribution layer having a peripheral distribution step portion directly on the peripheral lead step portion.

10. The method as claimed in claim 6 further comprising applying a sink adhesive on the heatsink and the central lead.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE>" TO "STATS CHIPPAC PTE. LTD" PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0219. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 1, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064803/0300 →
RELEASE OF SECURITY INTEREST Recorded Jun 5, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052850/0237 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0219 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 2, 2012
From: DO, BYUNG TAI; TRASPORTO, ARNEL SENOSA; CHUA, LINDA PEI EE
To: STATS CHIPPAC LTD.
Reel/Frame 027969/0731 →