Manufacturing method of random access memory
View Patent ↗A manufacturing method of a random access memory includes the following steps: providing a semiconductor structure having an array region and a peripheral region; forming a plurality of first trenches in the array region, and concurrently, a plurality of second trenches on the peripheral region; forming a polysilicon layer to cover the array region and the peripheral region, and the first and the second trenches are filled up with the polysilicon layer; planarizing the polysilicon layer so the remaining polysilicon layer only resides in the first and the second trenches; forming a conductive layer on the semiconductor structure; patterning the conductive layer to form a plurality of landing pads on the array region, and a plurality of bit line units on the peripheral region; and forming a plurality of capacitor units which is in electrical connection to the landing pads.
1. A manufacturing method of a random access memory, comprising the following steps of:
providing a semiconductor structure having an array region and a peripheral region;
forming a plurality of first trenches in the array region, and concurrently, a plurality of second trenches on the peripheral region;
forming a polysilicon layer to cover on the array region and the peripheral region, and the first and the second trenches are filled up with the polysilicon layer;
planarizing the polysilicon layer so the remaining polysilicon layer is resided only in the first and the second trenches;
forming a conductive layer on the semiconductor structure;
patterning the conductive layer to form a plurality of landing pads on the array region and a plurality of bit line units on the peripheral region; and
forming a plurality of capacitor units which is in electrical connection to the landing pads;
wherein the first trenches are formed with penetrating through the bit line units.
2. The manufacturing method of the random access memory according to claim 1 , wherein the array region and the peripheral region are connected by a semiconductor substrate.
3. The manufacturing method of the random access memory according to claim 2 , wherein the base of the first trenches is defined by the top surface of the semiconductor substrate.
4. The manufacturing method of the random access memory according to claim 2 , wherein the base of the second trenches is partially defined by the top surface of the semiconductor substrate.
5. The manufacturing method of the random access memory according to claim 1 , wherein the planarizing of the polysilicon layer is by performed by means of chemical mechanical polishing.
6. The manufacturing method of the random access memory according to claim 1 , wherein the material of the conductive layer is selected from a group consisting of tungsten (W), titanium (Ti), titanium nitride (TiN), and a combination thereof.
7. The manufacturing method of the random access memory according to claim 1 , wherein the step of patterning the conductive layer further comprises the steps of:
performing the process of lithography for the first time to form a photoresistance layer having a first pattern on the conductive layer;
performing the process of lithography for the second time to form a photoresistance layer having a second pattern on the conductive layer; and
patterning the conductive layer by means of etching.
8. The manufacturing method of the random access memory according to claim 7 , wherein the first pattern is a linear pattern.
9. The manufacturing method of the random access memory according to claim 7 , wherein the second pattern is an island-shaped pattern.
10. The manufacturing method of the random access memory according to claim 1 , wherein the capacitor units are arranged in a hexagonal configuration.