IP Library Granted Patent US 8,759,977
Granted Patent B2
US 8,759,977 · App. 13/459,785 · Granted Jun 24, 2014

Elongated via structures

Inventors: Luke D. LaCroix (Williston, VT); Mark C. H. Lamorey (South Burlington, VT); Janak G. Patel (South Burlington, VT); Peter Slota, Jr. (Vestal, NY); David B. Stone (Jericho, VT)
Assignee: International Business Machines Corporation
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Quick Facts
Patent No.
US 8,759,977
App. No.
13/459,785
Granted
Jun 24, 2014
Kind
B2
Abstract

An integrated circuit structure includes a plurality of insulator layers (connected to each other) that form a laminated structure. Further included are via openings within each of the insulator layers, and conductive via material within the via openings. The conductive via material within corresponding via openings of adjacent insulator layers are electrically connected to form continuous electrical via paths through the insulator layers between the top surface and the bottom surface of the laminated structure. Within each of the continuous electrical via paths, the via openings are positioned relative to each other to form a diagonal structural path of the conductive via material through the laminated structure. The corresponding via openings of the adjacent insulator layers partially overlap each other. The diagonal structural paths are non-perpendicular to the top surface and the bottom surface.

Claims (38)

1. An integrated circuit structure comprising:

a plurality of insulator layers connected to each other and forming a laminated structure;

via openings within each of said insulator layers; and

conductive via material within said via openings,

said laminated structure having a top surface and a bottom surface opposite said top surface,

said plurality of insulator layers being between said top surface and said bottom surface of said laminated structure,

said conductive via material within corresponding ones of said via openings of adjacent ones of said insulator layers being electrically connected to form continuous electrical via paths between said top surface and said bottom surface of said laminated structure,

within each of said continuous electrical via paths, said via openings being positioned relative to each other to form a diagonal structural path of said conductive via material through said laminated structure,

said corresponding ones of said via openings of said adjacent ones of said insulator layers partially overlapping each other,

said diagonal structural path being non-perpendicular to said top surface and said bottom surface.

2. The integrated circuit structure according to claim 1 , further comprising multiple ones of said diagonal structural path comprising diagonal structural paths,

adjacent ones of said diagonal structural paths forming a triangular load-bearing structure with one of said top surface and said bottom surface.

3. The integrated circuit structure according to claim 2 , said triangular load-bearing structure preventing said laminated structure from warping and delaminating.

4. The integrated circuit structure according to claim 1 , each of said via openings comprising a first opening portion and a second opening portion, and within each of said via openings, said first opening portion being overlapped with, and offset from said second opening portion.

5. The integrated circuit structure according to claim 1 , said insulator layers being parallel to said top surface and said bottom surface.

6. The integrated circuit structure according to claim 1 , further comprising a flip chip connected to one of said bottom surface and said top surface.

7. An integrated circuit structure comprising:

a plurality of insulator layers connected to each other and forming a laminated structure;

via openings within each of said insulator layers; and

conductive via material within said via openings,

said laminated structure having a top surface and a bottom surface opposite said top surface,

said plurality of insulator layers being between said top surface and said bottom surface of said laminated structure,

said conductive via material within corresponding ones of said via openings of adjacent ones of said insulator layers being electrically connected to form continuous electrical via paths through said insulator layers between said top surface and said bottom surface of said laminated structure,

within each of said continuous electrical via paths, said via openings being positioned relative to each other to form a diagonal structural path of said conductive via material through said laminated structure,

said corresponding ones of said via openings of said adjacent ones of said insulator layers partially overlapping each other,

said diagonal structural path being non-perpendicular to said top surface and said bottom surface,

each of said via openings having three perpendicular dimensions comprising a depth dimension equal to a thickness of one of said insulator layers, a width dimension greater than said depth dimension, and a length dimension greater than said width dimension,

each of said via openings comprising a first opening portion and a second opening portion,

said first opening portion extending fully through a corresponding one of said insulator layers,

said second opening portion extending partially through said corresponding one of said insulator layers,

said length dimension of said second opening portion being greater than said length dimension of said first opening, and

said width dimension of said second opening portion being greater than said width dimension of said first opening.

8. The integrated circuit structure according to claim 7 , further comprising multiple ones of said diagonal structural path comprising diagonal structural paths,

adjacent ones of said diagonal structural paths forming a triangular load-bearing structure with one of said top surface and said bottom surface.

9. The integrated circuit structure according to claim 8 , said triangular load-bearing structure preventing said laminated structure from warping and delaminating.

10. The integrated circuit structure according to claim 7 , within each of said via openings, said first opening portion being overlapped with, and offset from said second opening portion.

11. The integrated circuit structure according to claim 7 , said plurality of insulator layers being parallel to said top surface and said bottom surface.

12. The integrated circuit structure according to claim 7 , further comprising a flip chip connected to one of said bottom surface and said top surface.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded May 12, 2021
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 056987/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2020
From: GLOBALFOUNDRIES INC.
To: GLOBALFOUNDRIES U.S. INC.
Reel/Frame 054633/0001 →
SECURITY AGREEMENT Recorded Nov 29, 2018
From: GLOBALFOUNDRIES INC.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 049490/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 30, 2012
From: LACROIX, LUKE D.; LAMOREY, MARK C.H.; PATEL, JANAK G.; SLOTA, PETER, JR.; STONE, DAVID B.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 028128/0723 →
Continuity (1)
Related Publication 20130285251A1 · Oct 31, 2013