Testing circuit for an analog to digital converter
View Patent ↗A testing circuit configures an analog to digital converter (ADC) to receive a test signal instead of a live input signal. The testing circuit compares an output test value from the ADC to an expected test value for the test signal. The testing circuit provides an expected live output value to a digital circuit instead of the output test value, thereby preventing the ADC from providing a value to the digital circuit not based on the live input signal.
1. A method performed by a testing circuit for testing an analog to digital converter (ADC), the method comprising:
configuring the ADC to receive a live input signal and provide one or more output digital values to a digital circuit;
determining an expected live output value of the ADC for a testing time period for the live input signal;
during the testing time period:
configuring the ADC to receive a test signal instead of the live input signal;
providing the test signal to the ADC;
receiving an output test value from an output of the ADC;
comparing the output test value to an expected test value for the test signal; and
providing the expected live output value to the digital circuit instead of the output test value.
2. The method of claim 1 , further comprising, after the testing time period, reconfiguring the ADC to receive the live input signal.
3. The method of claim 1 , wherein the live input signal varies at a live frequency, and wherein determining the expected live output value for the testing time period comprises determining the expected live output value assuming that the live input signal will continue varying at the live frequency through the testing time period.
4. The method of claim 3 , wherein determining the expected live output value comprises determining that the expected live output is zero at a time when the amplitude of the live input signal will be crossing zero if the live input signal continues varying at the live frequency.
5. The method of claim 3 , wherein determining the expected live output value comprises applying an interpolation filter to the live input signal.
6. The method of claim 5 , wherein the live input signal is substantially band-limited to a maximum frequency, and wherein the ADC is configured to sample the live input signal at a sampling frequency greater than or equal to twice the maximum frequency of the live input signal.
7. The method of claim 1 , wherein the live input signal is based on a power signal at a utility frequency from an electric power grid, and wherein determining the expected live output value for the testing time period comprises:
determining based on the utility frequency a time when the amplitude of the power signal will be equal to zero as the amplitude of the power signal crosses from a positive value to a negative value or as the amplitude of the power signal crosses from a negative value to a positive value;
determining the time period as encompassing the time when the amplitude of the power signal will be equal to zero; and
determining that the expected live output value is zero.
8. A testing circuit for testing an analog to digital converter (ADC), the testing circuit comprising:
a test signal generator configured to generate a test signal, the test signal generator being coupled to an input of the ADC;
a test signal comparator configured to compare an output value of the ADC to an expected test output value for the test signal the test signal comparator being coupled to an output of the ADC; and
an expected value predictor configured to determine an expected live output value of the ADC for a testing time period;
wherein the testing circuit is configured to perform operations comprising:
during the testing time period, configuring the ADC to receive the test signal instead of a live input signal;
providing the test signal to the ADC;
receiving an output test value from an output of the ADC;
comparing the output test value to the expected test value for the test signal; and
providing the expected live output value to a digital circuit instead of the output test value.
9. The testing circuit of claim 7 , further comprising an input circuit configured to select between the live input signal and the test signal and an output circuit configured to select between the output of the ADC and an expected live output of the testing circuit.
10. The testing circuit of claim 7 , wherein determining the expected live output value for the testing time period comprises determining the expected live output value assuming that the live input signal will continue varying at a live frequency through the testing time period.
11. The testing circuit of claim 10 , wherein determining the expected live output value comprises determining that the expected live output is zero at a time when the amplitude of the live input signal will be crossing zero if the live input signal continues varying at the live frequency.
12. The testing circuit of claim 10 , wherein determining the expected live output value comprises applying interpolation to the live input signal.
13. The testing circuit of claim 12 , wherein the live input signal is substantially band-limited to a maximum frequency, and wherein the ADC is configured to sample the live input signal at a sampling frequency greater than or equal to twice the maximum frequency of the live input signal.
14. An electricity meter comprising:
a live signal input;
a digital signal processor (DSP);
an analog to digital converter (ADC);
an input circuit coupled to the live signal input;
an output circuit coupled to an ADC output and the DSP; and
a test management circuit coupled to the input circuit and the output circuit, wherein the test management circuit is configured to perform operations comprising:
determining an expected live output value of the ADC for a testing time period for a live input signal on the live signal input;
during the testing time period, configuring the input circuit so that the ADC receives the test signal instead of a live input signal and configuring the output circuit so that the DSP receives the expected live output value instead of an output test value from the ADC;
providing the test signal to the ADC;
receiving an output test value from an output of the ADC; and
comparing the output test value to the expected test value for the test signal.
15. The electricity meter of claim 14 , wherein determining the expected live output value for the testing time period comprises determining the expected live output value assuming that the live input signal will continue varying at a live frequency through the testing time period.
16. The electricity meter of claim 15 , wherein determining the expected live output value comprises determining that the expected live output is zero at a time when the amplitude of the live input signal will be crossing zero if the live input signal continues varying at the live frequency.
17. The electricity meter of claim 15 , wherein determining the expected live output value comprises applying an interpolation filter to the live input signal.
18. The electricity meter of claim 15 , wherein the live frequency is a utility frequency for an electric power grid.