IP Library Granted Patent US 9,390,945
Granted Patent B2
US 9,390,945 · App. 13/466,945 · Granted Jul 12, 2016

Semiconductor device and method of depositing underfill material with uniform flow rate

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Quick Facts
Patent No.
US 9,390,945
App. No.
13/466,945
Granted
Jul 12, 2016
Kind
B2
Abstract

A semiconductor device has a substrate and insulating layer formed over a surface of the substrate. A first conductive layer is formed over the surface of the substrate. A second conductive layer is formed over an opposing surface of the substrate. A conductive via is formed through the substrate. An opening is formed in the insulating layer while leaving the first conductive layer intact. The opening narrows with a non-linear side or linear side. The opening can have a rectangular shape. A semiconductor die is mounted over the surface of the substrate. An underfill material is deposited between the semiconductor die and substrate. The opening in the insulating layer reduces a flow rate of the underfill material proximate to the opening. The flow rate of the underfill material proximate to the opening is substantially equal to a flow rate of the underfill material away from the opening.

Claims (60)

1. A method of making a semiconductor device, comprising:

providing a substrate;

forming an insulating layer over a first surface of the substrate;

forming a plurality of openings in the insulating layer;

providing a semiconductor die including a first region with a first bump density and a second region with a second bump density less than the first bump density;

disposing the semiconductor die over the first surface of the substrate; and

depositing an underfill material between the semiconductor die and substrate, wherein the openings in the insulating layer reduce a flow rate of the underfill material proximate to the openings.

2. The method of claim 1 , wherein the flow rate of the underfill material proximate to the openings is substantially equal to a flow rate of the underfill material away from the openings.

3. The method of claim 1 , further including:

forming a first conductive layer over the first surface of the substrate; and

forming the opening in the insulating layer while leaving the first conductive layer intact.

4. The method of claim 3 , further including:

forming a second conductive layer over a second surface of the substrate opposite the first surface of the substrate; and

forming a conductive via through the substrate electrically connected to the first conductive layer and second conductive layer.

5. The method of claim 1 , further including forming the openings to narrow with a non-linear side.

6. The method of claim 1 , further including forming the openings to narrow with a linear side.

7. A method of making a semiconductor device, comprising:

providing a substrate;

forming an opening in the substrate;

providing a semiconductor die;

disposing the semiconductor die over the substrate; and

depositing an underfill material between the semiconductor die and substrate, wherein the opening in the substrate reduces a flow rate of the underfill material proximate to the opening.

8. The method of claim 7 , wherein the flow rate of the underfill material proximate to the opening is substantially equal to a flow rate of the underfill material away from the opening.

9. The method of claim 7 , wherein providing the substrate further includes:

providing a base material;

forming an insulating layer over a first surface of the base material; and

forming a first conductive layer over the first surface of the base material.

10. The method of claim 9 , further including:

forming a second conductive layer over a second surface of the base material opposite the first surface of the base material; and

forming a conductive via through the substrate electrically connected to the first conductive layer and second conductive layer.

11. The method of claim 7 , further including forming the opening to narrow with a non-linear side.

12. The method of claim 7 , further including forming the opening to narrow with a linear side.

13. The method of claim 7 , further including forming the opening to include a rectangular shape.

14. A method of making a semiconductor device, comprising:

providing a substrate;

removing a portion of a first surface of the substrate to form an opening while leaving a second surface of the substrate opposite the first surface intact;

disposing a semiconductor die over the substrate; and

depositing an underfill material between the semiconductor die and substrate and into the opening in the substrate, wherein the opening in the substrate reduces a flow rate of the underfill material proximate to the opening.

15. The method of claim 14 , wherein the flow rate of the underfill material proximate to the opening is substantially equal to a flow rate of the underfill material away from the opening.

16. The method of claim 14 , wherein providing the substrate further includes:

providing a base material;

forming an insulating layer over a surface of the base material; and

forming a conductive layer over the surface of the base material.

17. The method of claim 14 , further including forming the opening to narrow with a non-linear side.

18. The method of claim 14 , further including forming the opening to narrow with a linear side.

19. The method of claim 14 , further including forming the opening to include a rectangular shape.

20. A method of making a semiconductor device, comprising:

providing a substrate;

forming an opening partially through the substrate;

disposing a semiconductor die over the substrate; and

depositing an underfill material between the semiconductor die and substrate, wherein a flow rate of the underfill material proximate to the opening is substantially equal to a flow rate of the underfill material away from the opening.

21. The method of claim 20 , wherein providing the substrate further includes:

providing a base material;

forming an insulating layer over a surface of the base material; and

forming a conductive layer over the surface of the base material.

22. The method of claim 20 , further including forming the opening to narrow with a non-linear side.

23. The method of claim 20 , further including forming the opening to narrow with a linear side.

24. The method of claim 9 , wherein forming the opening in the substrate further includes forming the opening in the insulating layer while leaving the first conductive layer intact.

25. The method of claim 16 , wherein removing the portion of the substrate further includes removing a portion of the insulating layer while leaving the conductive layer intact.

26. The method of claim 20 , wherein forming the opening in the substrate further includes forming the opening in the insulating layer while leaving the conductive layer intact.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE. " TO STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0391. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064809/0877 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0391 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2012
From: LEE, KYUNGHOON; YANG, JOUNGIN; PARK, SANG MI; CHOI, DAESIK; PARK, YISU
To: STATS CHIPPAC, LTD.
Reel/Frame 028176/0573 →