IP Library Granted Patent US 8,557,673
Granted Patent B1
US 8,557,673 · App. 13/476,251 · Granted Oct 15, 2013

Manufacturing method for high capacitance capacitor structure

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Quick Facts
Patent No.
US 8,557,673
App. No.
13/476,251
Granted
Oct 15, 2013
Kind
B1
Abstract

A manufacturing method of a capacitor structure is provided, which includes the steps of: on a substrate having a first oxide layer, (a) forming a first suspension layer on the first oxide layer; (b) forming a first shallow trench into the first oxide layer above the substrate; (c) forming a second oxide layer filling the first shallow trench; (d) forming a second suspension layer on the second oxide layer; (e) forming a second shallow trench through the second suspension layer into the second oxide layer above the first suspension layer; (f) forming at least one deep trench on the bottom surface of the second shallow trench through the second and the first oxide layers, (g) forming an electrode layer on the inner surface of the deep trench; and (h) removing the first and second oxide layers through the trench openings in the first and the second suspension layers.

Claims (21)

1. A manufacturing method of high capacitance capacitor structure, comprising the steps of:

providing a substrate ( 15 ) having a first oxide layer ( 17 ) formed on a top surface thereof;

forming a first suspension layer ( 11 ) on the first oxide layer;

forming a first shallow trench ( 13 ) through the first suspension layer into the first oxide layer above the substrate;

forming a second oxide layer on the first suspension layer ( 11 ) and filling the first shallow trench;

forming a second suspension layer ( 12 ) on the second oxide layer;

forming a second shallow trench ( 14 ) through the second suspension layer ( 12 ) into the second oxide layer above the first suspension layer ( 11 );

forming at least one deep trench ( 16 ) on the bottom surface of the second shallow trench ( 14 ) through the first oxide layer ( 17 ) and the second oxide layer, the cross-section of the deep trench ( 16 ) being smaller than that of the second shallow trench ( 14 );

forming a electrode layer ( 18 ) on the inner surface of the deep trench; and

removing the first oxide layer and the second oxide layer through the trench openings in the first and the second suspension layers.

2. The manufacturing method of high capacitance capacitor structure according to claim 1 , wherein the first suspension layer is made of silicon nitride, the second suspension layer is made of silicon nitride.

3. The manufacturing method of high capacitance capacitor structure according to claim 1 , wherein the step of providing a substrate having a first oxide layer thereon comprising the steps of:

providing a substrate; and

depositing a the first oxide layer on the substrate.

4. The manufacturing method of high capacitance capacitor structure according to claim 1 , wherein the inside diameter of the second shallow trench is longer than the inside diameter of the first shallow trench.

5. The manufacturing method of high capacitance capacitor structure according to claim 1 , wherein the electrode layer is made of titanium or titanium nitride.

6. The manufacturing method of high capacitance capacitor structure according to claim 1 , wherein the electrode layer formed on the bottom portion of the inner surface of the deep trench is made of titanium.

7. The manufacturing method of high capacitance capacitor structure according to claim 1 , wherein the electrode layer formed on the side portion of the inner surface of the deep trench is made of titanium nitride.

8. The manufacturing method of high capacitance capacitor structure according to claim 1 , wherein the first shallow is formed by an etching step, the second shallow is formed by an etching step.

9. The manufacturing method of high capacitance capacitor structure according to claim 1 , wherein the inside diameter of the first shallow trench is longer than the inside diameter of the deep trench, the inside diameter of the second shallow trench is longer than the inside diameter of the deep trench.

10. The manufacturing method of high capacitance capacitor structure according to claim 1 , wherein the first oxide layer is made of TEOS, PSG, or USG, the second oxide layer is made of TEOS, PSG, or USG.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050695/0825 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2017
From: INOTERA MEMORIES, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 041820/0815 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Feb 10, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041675/0105 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2012
From: HUANG, SHIN-BIN; HSU, CHENG YEH; HUANG, CHUNG-LIN
To: INOTERA MEMORIES, INC.
Reel/Frame 028256/0835 →