Integrated circuit package system with stackable devices and a method of manufacture thereof
View Patent ↗An integrated circuit package system includes: providing a package substrate; mounting an interposer chip containing active circuitry over the package substrate; attaching a conductive bump stack having a base bump end and a stud bump end, the base bump end on the interposer chip; connecting a stack connector to the interposer chip and the package substrate; and applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed.
1. A method for manufacturing an integrated circuit package system comprising:
providing a package substrate;
mounting an interposer chip containing active circuitry over the package substrate;
attaching a conductive bump stack, including at least two conductive bond bumps, having a base bump end and a stud bump end, the base bump end on the interposer chip;
connecting a stack connector to the interposer chip and the package substrate; and
applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed.
2. The method as claimed in claim 1 further comprising providing an integrated circuit module having the interposer chip thereover.
3. The method as claimed in claim 1 wherein connecting the stack connector includes connecting the stack connector to the package substrate and the interposer chip having a spacing from any of the conductive bump stack.
4. The method as claimed in claim 1 wherein connecting the stack connector includes connecting the stack connector to the conductive bump stack and the package substrate.
5. The method as claimed in claim 1 further comprising connecting an external device on the stud bump end.
6. A method for manufacturing an integrated circuit package system comprising:
providing a package substrate having a component side;
mounting an interposer chip containing active circuitry and having a chip bond pad adjacent an active chip surface over the package substrate;
attaching a conductive bump stack, including at least two conductive bond bumps, having a base bump end and a stud bump end, the base bump end on the interposer chip;
connecting a stack connector to the interposer chip and the component side of the package substrate; and
applying a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack providing the stud bump end substantially exposed adjacent the package encapsulant.
7. The method as claimed in claim 6 further comprising providing an integrated circuit module on the package substrate having the interposer chip thereover.
8. The method as claimed in claim 6 wherein connecting the stack connector includes connecting the stack connector to the package substrate and the chip bond pad without the conductive bump stack.
9. The method as claimed in claim 6 wherein connecting the stack connector includes connecting the stack connector to the package substrate and the chip bond pad with the conductive bump stack.
10. The method as claimed in claim 6 further comprising connecting an external device having external connectors on the stud bump end of the conductive bump stack.
11. An integrated circuit package system comprising:
a package substrate;
an interposer chip containing active circuitry mounted over the package substrate;
a conductive bump stack, including at least two conductive bond bumps, having a base bump end and a stud bump end, the base bump end on the interposer chip;
a stack connector connected to the interposer chip and the package substrate; and
a package encapsulant over the interposer chip, the stack connector, and the conductive bump stack with the stud bump end of the conductive bump stack substantially exposed.
12. The system as claimed in claim 11 further comprising an integrated circuit module having the interposer chip thereover.
13. The system as claimed in claim 11 wherein the stack connector is connected to the package substrate and the interposer chip having a spacing from any of the conductive bump stack.
14. The system as claimed in claim 11 wherein the stack connector is connected to the conductive bump stack and the package substrate.
15. The system as claimed in claim 11 further comprising an external device connected on the stud bump end.
16. The system as claimed in claim 11 wherein:
the interposer chip containing active circuitry has a chip bond pad adjacent an active chip surface;
the conductive bump stack having the base bump end and the stud bump end, the base bump end on the interposer chip;
the stack connector is connected to the interposer chip and a component side of the package substrate; and
the package encapsulant is over the interposer chip, the stack connector, and the conductive bump stack providing the stud bump end substantially exposed adjacent the package encapsulant.
17. The system as claimed in claim 16 further comprising an integrated circuit module on the package substrate having the interposer chip thereover.
18. The system as claimed in claim 16 wherein the stack connector is connected to the package substrate and the chip bond pad without the conductive bump stack.
19. The system as claimed in claim 16 wherein the stack connector is connected to the chip bond pad adjacent the conductive bump stack and the package substrate.
20. The system as claimed in claim 16 further comprising an external device having an external connector connected on the stud bump end of the conductive bump stack.