High temperature half bridge gate driver
View Patent ↗A half bridge gate driving circuit for providing gate driving circuits in a bi-hecto celcius (200 degrees celcius) operating environment having multiple functions including combinations of multiple level logic inputs, noise immunity, fault protection, overlap protection, pulse modulation, high-frequency modulation with transformer based isolation, high-frequency demodulation back to pulse width modulation, deadtime generator, level shifter for high side transistor, overcurrent protection, and undervoltage lockout.
1. A gate driver, comprising:
a primary side circuit generating a primary modulated output;
an isolation transformer accepting the primary modulated output and generating an isolated modulated signal;
a secondary side circuit accepting the isolated modulated signal and outputting a drive signal;
a totem pole output accepting the drive signal;
a logic level translator accepting an input voltage peak-to-peak value of three and one third volts to five volts; and
a hysteresis circuit connected to the logic level translator.
2. A gate driver, comprising:
a primary side circuit generating a primary modulated output;
an isolation transformer accepting the primary modulated output and generating an isolated modulated signal;
a secondary side circuit accepting the isolated modulated signal and outputting a drive signal;
a totem pole output accepting the drive signal; and
a pulse width modulation conditioner circuit including a nonoverlap protection circuit.
3. A gate driver, comprising:
a primary side circuit generating a primary modulated output
an isolation transformer accepting the primary modulated output and generating an isolated modulated signal;
a secondary side circuit accepting the isolated modulated signal and outputting a drive signal;
a totem pole output accepting the drive signal; and
a pulse width modulation conditioner circuit including a fault protection circuit.
4. A gate driver, comprising:
a primary side circuit generating a primary modulated output;
an isolation transformer accepting the primary modulated output and generating an isolated modulated signal;
a secondary side circuit accepting the isolated modulated signal and outputting a drive signal;
a totem pole output accepting the drive signal; and
a modulator including a voltage controlled oscillator.
5. The gate driver of claim 4 , the voltage controlled oscillator further comprising:
a single-ended ring of current-starved inverters.
6. A gate driver, comprising:
a primary side circuit generating a primary modulated output;
an isolation transformer accepting the primary modulated output and generating an isolated modulated signal;
a secondary side circuit accepting the isolated modulated signal and outputting a drive signal;
a totem pole output accepting the drive signal;
a demodulator circuit including a full-wave rectifier and an external high pass filter connection; and
a buffer connected to a low pass filter connected to a second buffer.
7. A gate driver, comprising:
a primary side circuit generating a primary modulated output;
an isolation transformer accepting the primary modulated output and generating an isolated modulated signal;
a secondary side circuit accepting the isolated modulated signal and outputting a drive signal;
a totem pole output accepting the drive signal; and
a dead time generator including a first nor gate, a second nor gate, an inverter connected to the second nor gate, and delay circuitry including current-starved inverters separated by capacitors.
8. A gate driver, comprising:
a primary side circuit generating a primary modulated output;
an isolation transformer accepting the primary modulated output and generating an isolated modulated signal;
a secondary side circuit accepting the isolated modulated signal and outputting a drive signal;
a totem pole output accepting the drive signal; and
a discrete buffer circuit including a buffer capacitor; and
a buffer resistor connected to a follower junction gate field-effect transistor.
9. A gate driver, comprising:
a primary side circuit generating a primary modulated output;
an isolation transformer accepting the primary modulated output and generating an isolated modulated signal;
a secondary side circuit accepting the isolated modulated signal and outputting a drive signal;
a totem pole output accepting the drive signal;
a discrete buffer circuit including a buffer capacitor;
a buffer resistor connected to a follower junction gate field-effect transistor; and
the follower junction gate field-effect transistor connected by a follower capacitor in parallel with a follower resistor to the gate of an junction gate field-effect transistor; and
a middle diode connected to the source of the follower junction gate field-effect transistor; and
a gate diode connected from the gate of the junction gate field-effect transistor to the middle diode.