Managing security in solid-state devices
View Patent ↗A computing device and method for managing security of a memory or storage device without the need for administer privileges. To access the secure memory, a host provides a data block containing a control command and authentication data to the memory device. The memory device includes a controller for controlling access to a secure memory in the memory device. The memory device identifies the control command in the data block, authenticates the control command bused on the authentication data, and executes the control command to allow the host device to access the secure memory.
1. A memory device comprising:
a first memory;
a second memory comprising a first file allocation table for the first memory;
a controller coupled to the first memory and to the second memory, wherein the controller is configured to:
provide control instructions to a host device;
receive at least one data block from the host device;
determine if the at least one data block comprises a control command;
in a case where the at least one data block comprises a control command, authenticate the at least one data block based on authentication data included within the at least one data block, identify the control command, and set a mode of the memory device to control access to the first memory by subsequent input-output commands from the host device based on the control command; and
prevent access to the first memory by preventing access to the first file allocation table; and
a third memory coupled to the controller, the second memory further comprising a second file allocation table for the third memory.
2. The memory device of claim 1 , wherein the controller is further configured to store, in a case where the at least one data block does not comprise the control command, the at least one data block in the first memory.
3. The memory device of claim 1 , wherein the controller is further configured to initially prevent access to the first memory, the controller further configured to execute the control command to allow access to the first memory.
4. The memory device of claim 1 , wherein the authentication data includes a file signature.
5. The memory device of claim 1 , wherein the authentication data includes a password.
6. The memory device of claim 1 , wherein the first memory is a flash memory.
7. A memory device for storing data of a host device, comprising:
a memory unit comprising a first memory, a second memory and a third memory, the third memory being configured to store a first file allocation table for the first memory and a second file allocation table for the second memory; and
a controller coupled to the memory unit,
wherein the controller is configured to:
provide control instructions to the host device;
receive at least one data block from the host device;
allow the host device to access the first memory;
determine if the at least one data block comprises a control command;
in a case where the at least one data block comprises a control command, authenticate the at least one data block based on authentication data included within the at least one data block, identify the control command, and set a mode of the memory device to control access from the host device to the second memory by subsequent input-output commands based on the control command, and
wherein the controller is configured to prevent the host device from accessing the second memory by preventing the host device from accessing the second file allocation table.
8. The memory device of claim 7 , wherein the controller is further configured to store, in a case where the at least one data block does not comprise the control command, the at least one data block in the first memory.
9. The memory device of claim 7 , wherein the controller is configured to initially prevent the host device from accessing the second memory, the controller further configured to subsequently execute the control command to allow the host device to access the second memory with subsequent input-output commands.
10. The memory device of claim 7 , wherein the third memory is further configured to store a partition table for allocating a portion of the memory unit to the first memory and another portion of the memory unit to the second memory.