IP Library Granted Patent US 9,269,598
Granted Patent B2
US 9,269,598 · App. 13/569,105 · Granted Feb 23, 2016

Semiconductor device and method of forming an IPD over a high-resistivity encapsulant separated from other IPDS and baseband circuit

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Quick Facts
Patent No.
US 9,269,598
App. No.
13/569,105
Granted
Feb 23, 2016
Kind
B2
Abstract

A semiconductor device has a first conductive layer formed over a sacrificial substrate. A first integrated passive device (IPD) is formed in a first region over the first conductive layer. A conductive pillar is formed over the first conductive layer. A high-resistivity encapsulant greater than 1.0 kohm-cm is formed over the first IPD to a top surface of the conductive pillar. A second IPD is formed over the encapsulant. The first encapsulant has a thickness of at least 50 micrometers to vertically separate the first and second IPDs. An insulating layer is formed over the second IPD. The sacrificial substrate is removed and a second semiconductor die is disposed on the first conductive layer. A first semiconductor die is formed in a second region over the substrate. A second encapsulant is formed over the second semiconductor die and a thermally conductive layer is formed over the second encapsulant.

Claims (37)

1. A semiconductor device, comprising:

a first integrated passive device (IPD) formed in a first region of the semiconductor device;

a conductive pillar formed over a surface of the first IPD;

a semiconductor die disposed in a second region of the semiconductor device laterally offset from the first IPD;

a first encapsulant deposited over the first IPD and semiconductor die;

an insulating layer formed over the first encapsulant; and

a second IPD formed over the first encapsulant and insulating layer opposite the first IPD to reduce inter-device interference between the first IPD and second IPD.

2. The semiconductor device of claim 1 , wherein the first IPD and second IPD include a resistor, capacitor, or inductor.

3. The semiconductor device of claim 1 , further including a semiconductor component disposed over a surface of the semiconductor device opposite the second IPD.

4. The semiconductor device of claim 3 , further including a second encapsulant formed over the semiconductor component.

5. The semiconductor device of claim 1 , wherein the first encapsulant includes a resistivity greater than 1.0 kohm-cm.

6. The semiconductor device of claim 1 , wherein the first IPD is separated from the second IPD by a thickness of at least 50 micrometers.

7. A semiconductor device, comprising:

a first integrated passive device (IPD) formed in a first region of the semiconductor device;

a conductive pillar formed in a peripheral region of the first IPD and extending above the first IPD;

a first semiconductor die disposed in a second region of the semiconductor device laterally offset from the first IPD;

an encapsulant deposited over the first IPD, first semiconductor die, and conductive pillar;

an insulating layer formed over the encapsulant; and

a second IPD formed over the encapsulant and insulating layer opposite the first IPD to reduce inter-device interference between the first IPD and second IPD.

8. The semiconductor device of claim 7 , further including a second semiconductor die disposed over a surface of the semiconductor device opposite the second IPD.

9. The semiconductor device of claim 7 , wherein the first IPD and second IPD include a resistor, capacitor, or inductor.

10. The semiconductor device of claim 7 , further including a heat sink disposed over a surface of the semiconductor device.

11. The semiconductor device of claim 7 , wherein the first IPD or second IPD includes a high frequency IPD and the first semiconductor die includes a baseband component.

12. The semiconductor device of claim 7 , wherein the encapsulant includes a resistivity greater than 1.0 kohm-cm.

13. The semiconductor device of claim 7 , wherein the encapsulant includes a thickness of at least 50 micrometers.

14. A semiconductor device, comprising:

a first integrated passive device (IPD) formed in a first region of the semiconductor device;

a conductive pillar formed over a surface of the first IPD;

a semiconductor die disposed in a second region of the semiconductor device laterally offset from the first IPD;

a single encapsulant layer deposited over the first IPD and around the semiconductor die;

an insulating layer formed over the single encapsulant layer; and

a second IPD formed over the single encapsulant layer and insulating layer opposite the first IPD to reduce inter-device interference between the first IPD and second IPD.

15. The semiconductor device of claim 14 , wherein the first IPD is separated from the second IPD by at least 50 micrometers.

16. The semiconductor device of claim 14 , wherein the first IPD and second IPD include a resistor, capacitor, or inductor.

17. The semiconductor device of claim 14 , further including a semiconductor component disposed over a surface of the semiconductor device.

18. The semiconductor device of claim 14 , wherein the first IPD or second IPD includes a high frequency IPD and the semiconductor die includes a baseband component.

19. The semiconductor device of claim 14 , wherein the single encapsulant layer includes a resistivity greater than 1.0 kohm-cm.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 38378 FRAME: 427. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 29, 2024
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 067556/0715 →
RELEASE OF SECURITY INTEREST Recorded Jun 17, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 053511/0298 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0427 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →