IP Library Granted Patent US 8,629,796
Granted Patent B1
US 8,629,796 · App. 13/597,939 · Granted Jan 14, 2014

Preventing interference between microcontroller components

Inventors: Sebastien Jouin (La Chapelle Launay, FR); Romain Oddoart (Petit Mars, FR); Mickael Le Dily (Carquefou, FR); Jerome Poidevin (Carquefou, FR)
Assignee: Atmel Corporation
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Quick Facts
Patent No.
US 8,629,796
App. No.
13/597,939
Granted
Jan 14, 2014
Kind
B1
Abstract

A microcontroller includes first and second modules. The first module can operate in a mode that causes interference with operation of the second module. A control circuit on the first module and a control circuit on the second module coordinate operation of the first and second modules to prevent the interference from causing the second module to function incorrectly.

Claims (62)

1. A microcontroller comprising:

a first circuit module configured to operate in an active mode and a static mode;

a first control circuit coupled to the first circuit module, the first control circuit configured to select between the active mode and the static mode for the first circuit module;

a second circuit module configured to perform an operation susceptible to interference from the first circuit module when the first circuit module is operating in the active mode; and

a second control circuit coupled to the second circuit module, the second control circuit configured to cause the second circuit module to perform the operation;

wherein the first control circuit is configured to detect an event signal, select the static mode for the first circuit module, and propagate a ready signal;

wherein the second control circuit is configured to detect the ready signal, perform the operation, and propagate an end signal after the second circuit module completes performance of the operation; and

wherein the first control circuit is configured to detect the end signal and select the active mode of operation.

2. The microcontroller of claim 1 , further comprising:

a first control line coupled to the first control circuit, the first control line configured to propagate the event signal;

a second control line coupled to the first control circuit and the second control circuit, the second control line configured to propagate the ready signal; and

a third control line coupled to the first controller and the second controller, the third control line configured to propagate the end signal;

an event routing module coupled to the first, second, and third control lines; and

a timer module coupled to the event routing module and configured to generate the event signal.

3. The microcontroller of claim 2 , further comprising:

a fourth control line coupled to the first control circuit and to the event routing module, the fourth control line configured to propagate a force-event signal;

a fifth control line coupled to the second control circuit and to the event routing module, the fifth control line configured to propagate a force-operate signal;

wherein the first control circuit is configured to detect the force-event signal and to select the active mode of operation for the first circuit module; and

wherein the second control circuit is configured to detect the force-operate signal and to cause the second circuit module to perform the operation.

4. The microcontroller of claim 1 , further comprising a voltage signal line configured to conduct an electrical signal having a voltage value;

wherein the first circuit module is a switching regulator comprising a switch and an energy storage device configured to store energy;

wherein the switching regulator is configured to control the voltage value by actively toggling the switch when operating in the active mode; and

wherein the switching regulator is configured to control the voltage value by releasing the energy stored in the energy storage device when operating in the static mode.

5. The microcontroller of claim 1 , wherein the second circuit module is an analog to digital converter, and wherein the operation comprises converting an analog signal into one or more digital signals.

6. The microcontroller of claim 5 , wherein the analog to digital converter is configured to save power when not performing the operation.

7. The microcontroller of claim 5 , wherein the first circuit module is a switching regulator, and wherein the switching regulator is located within 200, 400, or 800 microns or closer to the analog to digital converter.

8. The microcontroller of claim 1 , wherein the second circuit module is an analog to digital converter configured to continuously convert the analog signal into one or more digital signals, and wherein performing the operation comprises outputting the digital signal for reading.

9. A method performed by a first control circuit, the method comprising:

receiving an event signal and controlling a first circuit module to switch from operating in an active mode to operating in a static mode;

determining that the first circuit module is operating in the static mode and sending a ready signal to a second control circuit, thereby causing a second circuit module to perform an operation susceptible to interference from the first circuit module;

receiving an end signal from the second control circuit; and

controlling the first circuit module to switch from operating in the static mode to operating in the active mode after receiving the end signal.

10. The method of claim 9 , further comprising:

receiving, from a timer module, the event signal through an event routing module;

sending the ready signal through the event routing module; and

receiving the end signal through the event routing module.

11. The method of claim 9 , further comprising:

receiving a force-event signal and, as a consequence of receiving the force-event signal, controlling the first circuit module to switch from operating in the active mode to operating in the static mode.

12. The method of claim 9 , wherein the first circuit module is a switching regulator, the method further comprising:

regulating a voltage value through the switching regulator when the switching regulator is in the active mode; and

maintaining the voltage value using an energy storage device when the voltage regulator is in static mode.

13. The method of claim 9 , wherein the second circuit module is an analog to digital converter, the method further comprising controlling the analog to digital converter to perform the operation, wherein performing the operation comprises converting an analog signal into one or more digital signals.

14. The method of claim 9 , wherein the second circuit module is an analog to digital converter, the method further comprising controlling the analog to digital converter to continuously convert an analog signal into one or more digital signals, wherein performing the operation comprises outputting the specific digital signals for reading.

15. The method of claim 9 , wherein the first circuit module is a switching regulator, wherein the second circuit module is an analog to digital converter, and wherein the performing the operation comprises converting an analog signal into a digital signal, and wherein the switching regulator is located 200, 400, or 800 microns or closer to the analog to digital converter.

16. A system comprising:

an event routing module;

a timer module configured to generate a first event signal; and

a microcontroller comprising:

a first circuit module configured to operate in an active mode and a static mode;

a first control circuit coupled to the first circuit module, the first control circuit configured to select between the active mode and the static mode for the first circuit module;

a second circuit module configured to perform an operation susceptible to interference from the first circuit module when the first circuit module is operating in the active mode; and

a second control circuit coupled to the second circuit module, the second control circuit configured to cause the second circuit module to perform the operation;

wherein the first control circuit is configured to detect an event signal, select the static mode for the first circuit module, and propagate a ready signal;

wherein the second control circuit is configured to detect the ready signal, perform the operation, and propagate an end signal after the second circuit module completes performance of the operation; and

wherein the first control circuit is configured to detect the end signal and then select the active mode of operation.

17. The system of claim 16 , wherein the timer and the event routing module are part of a microcontroller platform.

18. The system of claim 16 , further comprising a voltage signal line configured to conduct an electrical signal having a voltage value;

wherein the first circuit module is a switching regulator comprising a switch and an energy storage device configured to store energy;

wherein the switching regulator is configured to control the voltage value by actively toggling the switch when operating in the active mode; and

wherein the switching regulator is configured to control the voltage value by releasing the energy stored in the energy storage device when operating in the static mode.

19. The system of claim 16 , wherein the second circuit module is an analog to digital converter, wherein performing the operation comprises converting an analog signal into one or more digital signals.

20. The system of claim 16 , wherein the first circuit module is a switching regulator, and wherein the switching regulator is located 200, 400, or 800 microns or closer to the analog to digital converter.

Assignments (18)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 23, 2013
From: JOUIN, SEBASTIEN; ODDOART, ROMAIN; DILY, MICKAEL LE; POIDEVIN, JEROME
To: ATMEL NANTES S.A.S.
Reel/Frame 031458/0489 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2013
From: ATMEL NANTES S.A.S.
To: ATMEL CORPORATION
Reel/Frame 030181/0767 →
Continuity (1)
Provisional Application 61676605 · Jul 27, 2012