IP Library Granted Patent US 8,853,043
Granted Patent B2
US 8,853,043 · App. 13/610,641 · Granted Oct 7, 2014

Silicon germanium (SiGe) heterojunction bipolar transistor (HBT)

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,853,043
App. No.
13/610,641
Granted
Oct 7, 2014
Kind
B2
Abstract

A heterojunction bipolar transistor (HBT), an integrated circuit (IC) chip including at least one HBT and a method of forming the IC. The HBT includes an extrinsic base with one or more buried interstitial barrier layer. The extrinsic base may be heavily doped with boron and each buried interstitial barrier layer is doped with a dopant containing carbon, e.g., carbon or SiGe:C. The surface of the extrinsic base may be silicided.

Claims (39)

1. A method of forming heterojunction bipolar transistors (HBT) on an Integrated Circuit (IC), said method comprising:

defining a collector in a semiconductor surface;

forming a base layer on said semiconductor surface;

forming an interstitial barrier in said base layer;

forming an emitter above said collector; and

doping an extrinsic base portion of said base layer with a selected type dopant.

2. The method as in claim 1 , wherein forming the base layer and forming said interstitial barrier are repeated to form a plurality of alternating layers of interstitial barrier layers and base material layers, said interstitial barrier layers being step doped with a material comprising carbon.

3. The method as in claim 1 , wherein forming said interstitial barrier comprises implanting at least one layer of said base layer with a material comprising carbon.

4. The method as in claim 1 , further comprising:

forming a silicide layer on said extrinsic base portion.

5. The method as in claim 1 , wherein forming said interstitial barrier forms an uppermost surface and a lowermost surface of said interstitial barrier in said base layer, both directly contacting base layer material in said base layer.

6. The method as in claim 1 , wherein forming the emitter comprises forming said emitter on a thinned area of said base layer.

7. The method as in claim 1 , wherein forming said base layer comprises forming a Silicon-Germanium (SiGe) layer on said semiconductor surface, said SiGe layer forming a monocrystalline intrinsic base on said collector and polycrystalline said extrinsic base portions on either side of said collector, said interstitial barrier being formed in said extrinsic base regions.

8. The method as in claim 7 , wherein doping said extrinsic base portion is coincident with forming said base layer, said extrinsic base portions being in situ doped with boron to a solid solubility limit of boron in said SiGe layer.

9. A method of forming heterojunction bipolar transistors (HBT) on an Integrated Circuit (IC), said method comprising:

defining a collector in a semiconductor surface;

forming a base layer on said semiconductor surface, said base layer comprising a monocrystalline intrinsic base on said collector and polycrystalline extrinsic base portions on either side of said collector;

forming an interstitial barrier in said polycrystalline extrinsic base regions;

forming an emitter above said collector; and

doping said extrinsic base portions with a selected type dopant.

10. The method as in claim 9 , wherein forming said interstitial barrier forms at least one interstitial barrier layer, both an uppermost layer surface and a lowermost layer surface of said interstitial barrier directly contacting base layer material in said extrinsic base portions.

11. The method as in claim 10 , wherein forming said base layer comprises:

forming a Silicon-Germanium (SiGe) layer on said semiconductor surface; and

forming said emitter on a thinned monocrystalline intrinsic base region of said SiGe layer.

12. The method as in claim 11 , wherein forming the base layer and forming said interstitial barrier are repeated to form a plurality of alternating layers of interstitial barrier layers and base material layers, said interstitial barrier layers being step doped with a material comprising carbon.

13. The method as in claim 11 , wherein forming said interstitial barrier comprises implanting at least one layer of a material comprising carbon into said base layer.

14. The method as in claim 11 , wherein doping said polycrystalline extrinsic base portion is coincident with forming said base layer, said polycrystalline extrinsic base portions being in situ doped with boron to a solid solubility limit of boron in said SiGe layer.

15. The method as in claim 11 , further comprising:

forming a silicide layer on said extrinsic base portions.

16. A method of forming heterojunction bipolar transistors (HBT) on an Integrated Circuit (IC), said method comprising:

defining a collector in a semiconductor surface;

forming a base layer on said semiconductor surface, said base layer comprising a Silicon-Germanium (SiGe) layer, a monocrystalline intrinsic base forming on said collector and polycrystalline extrinsic base portions forming on either side of said collector;

forming an interstitial barrier in said extrinsic base regions, wherein forming said interstitial barrier forms at least one layer with both an uppermost layer surface and a lowermost layer surface of said interstitial barrier directly contacting polycrystalline extrinsic base layer SiGe;

forming an emitter on the monocrystalline intrinsic base above said collector;

doping said extrinsic base portions of said base layer with a selected type dopant; and

forming a silicide layer on said extrinsic base portion.

17. The method as in claim 16 , wherein forming the base layer and forming said interstitial barrier are repeated to form a plurality of alternating layers of interstitial barrier layers and base material layers, said interstitial barrier layers being step doped with a material comprising carbon.

18. The method as in claim 16 , wherein forming said interstitial barrier comprises implanting said base layer with at least one layer of a material comprising carbon.

19. The method as in claim 16 , wherein doping said extrinsic base portions is coincident with forming said base layer, said extrinsic base regions being in situ doped with boron to a solid solubility limit of boron in said SiGe layer.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 20, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054636/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2020
From: ALSEPHINA INNOVATIONS, INC.
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 053351/0839 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2019
From: GLOBALFOUNDRIES INC.
To: ALSEPHINA INNOVATIONS INC.
Reel/Frame 049612/0211 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 5, 2015
From: GLOBALFOUNDRIES U.S. 2 LLC; GLOBALFOUNDRIES U.S. INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 036779/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2015
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: GLOBALFOUNDRIES U.S. 2 LLC
Reel/Frame 036550/0001 →