Method and apparatus for power control
View Patent ↗Embodiments of the present invention relate to limiting maximum power dissipation occurred in a processor. Therefore, when an application that requires excessive amounts of power is being executed, the execution of the application may be prevented to reduce dissipated or consumed power.
1. A method for controlling temperature in a computer chip including multiple processing cores, the method comprising:
operatively coupling a temperature sensor chip external to the computer chip via a diode interface and via a serial connection interface of the computer chip;
tracking the temperature of the computer chip via the serial connection interface by monitoring temperature sensed by the external temperature sensor chip via the diode interface, the diode interface operatively coupled to a thermal diode of the computer chip;
preventing events from being processed in the computer chip to reduce temperature of the computer chip, in an event the monitored temperature exceeds a predetermined threshold;
associating each of the multiple processing cores with a field indicating a maximum power consumption limit for the respective core; and
dynamically adjusting the field associated with at least one of the multiple processing cores in the event the monitored temperature exceeds the predetermined threshold.
2. The method of claim 1 wherein the temperature is a junction temperature of the computer chip.
3. The method of claim 1 wherein preventing events from being processed in the computer chip to reduce temperature of the computer chip includes preventing instructions from being processed.
4. An apparatus for controlling temperature in a computer chip including multiple processing cores each associated with a field indicating a maximum power consumption limit for the respective core, the apparatus comprising:
a diode interface operatively coupled to a thermal diode of the computer chip and to a temperature sensor chip external to the computer chip;
a serial connection interface operatively coupled to the external temperature sensor chip;
a temperature monitor module to track temperature of the computer chip via the serial connection interface by monitoring temperature sensed by the external temperature sensor chip via the diode interface;
a performance reduction module to prevent events from being processed in the computer chip to reduce temperature of the computer chip, in an event the monitored temperature exceeds a predetermined threshold, and to dynamically adjust the field associated with at least one of the multiple processing cores in the event the monitored temperature exceeds the predetermined threshold.
5. The apparatus of claim 4 wherein the temperature is a junction temperature of the computer chip.
6. The apparatus of claim 4 wherein the performance reduction module is configured to prevent events from being processed in the computer chip by preventing instructions from being processed.