Integrated circuit packaging system with coreless substrate and method of manufacture thereof

1. A method of manufacture of an integrated circuit packaging system comprising:

forming a first metal layer on a carrier, the first metal layer having a component attachment pad and a first redistribution layer;

forming an insulation layer directly on the first metal layer, the insulation layer formed from a fiber fabric pre-impregnated with resin (PPG) material;

exposing a portion of the first metal layer and a portion of the insulation layer by removing the carrier, the exposed portion of the component attachment pad and the first redistribution layer facing away from the insulation layer and coplanar with a component side of the insulation layer, and the exposed portion of the first meal layer for directly attaching to a die interconnect connecting to an integrated circuit;

forming a second metal layer directly on the insulation layer opposite the side of the insulation layer exposed by removing the carrier, the second metal layer having a vertical interconnect within a vertical opening in the insulation layer, and the vertical interconnect directly on the first metal carrier; and

forming a protective layer directly on the insulation layer and the second metal layer, the PPG material of the insulation layer and the second metal layer forming a mold lock with the protective layer for resisting delamination, and the protective layer exposing a portion of the second metal layer for directly attaching an external interconnect.

2. The method as claimed in claim 1 wherein forming the insulation layer includes removing a portion of the insulation layer from the first metal layer, the first metal layer having the characteristics of the insulation layer removed.

3. The method as claimed in claim 1 wherein forming the protective layer includes forming the protective layer from a solder resist material.

4. The method as claimed in claim 1 wherein forming the second meal layer includes forming the vertical interconnect between a portion of the first metal layer and a portion of the second metal layer.

5. The method as claimed in claim 1 wherein forming the protective layer includes forming the protective layer between a portion of the second metal layer and another portion of the second metal layer.

6. A method of manufacture of an integrated circuit packaging system comprising:

forming a first metal layer having a component attachment pad and a first redistribution layer directly on a carrier;

forming an insulation layer directly on the component attachment pad and the first redistribution layer, the insulation layer formed from a fiber fabric pre-impregnated with resin (PPG) material, and

exposing a portion of the component attachment pad, a portion of the first redistribution layer, and a portion of the insulation layer by removing the carrier, the exposed portion of the component attachment pad and the exposed portion of the first redistribution layer facing away from the insulation layer and coplanar with the exposed side of the insulation layer, and the exposed portion of the component attachment pad and the exposed portion of the first redistribution layer for directly attaching to a die interconnect connecting to an integrated circuit;

forming a second metal layer having a system attachment pad and a second redistribution layer directly on the insulation layer and opposite the side of the insulation layer exposed by removing the carrier, the second metal layer having a vertical interconnect within a vertical opening in the insulation layer, and the vertical interconnect directly on the first metal carrier; and

forming a protective layer directly on the insulation layer, the system attachment pad, and the second redistribution layer, the PPG material of the insulation layer and the second metal layer forming a mold lock with the protective layer for resisting delamination, and the protective layer exposing a portion of the system attachment pad for directly attaching an external interconnect.

7. The method as claimed in claim 6 wherein forming the insulation layer includes removing a portion of the insulation layer from the component attachment pad, the component attachment pad having the characteristics of the insulation layer removed.

8. The method as claimed in claim 6 wherein forming the protective layer includes forming the protective layer from a solder resist material.

9. The method as claimed in claim 6 wherein forming the second meal layer includes forming the vertical interconnect between a portion of the first metal layer and a portion of the second metal layer.

10. The method as claimed in claim 6 wherein forming the protective layer includes forming the protective layer between a portion of the second redistribution layer and another portion of the second redistribution layer.

11. An integrated circuit packaging system comprising:

a first metal layer having a component attachment pad and a first redistribution layer for directly attaching to a die interconnect;

an insulation layer directly on the first metal layer with a portion of the component attachment pad and a portion of the first redistribution layer exposed and coplanar with a component side of the insulation layer, the insulation layer formed from a fiber fabric pre-impregnated with resin (PPG) material, and an exposed side of the first metal layer facing away from the insulation layer;

a second metal layer directly on the insulation layer and opposite the exposed side of the first metal layer, the second metal layer having a vertical interconnect within a vertical opening in the insulation layer, and the vertical interconnect directly on the first metal layer; and

a protective layer directly on the insulation layer and the second metal layer, the PPG material of the insulation layer and the second metal layer forming a mold lock with the protective layer for resisting delamination, and the protective layer exposing a portion of the second metal layer for directly attaching to an external interconnect.

12. The system as claimed in claim 11 wherein the first metal layer has the characteristics of the insulation layer removed.

13. The system as claimed in claim 11 wherein the protective layer is a solder resist material.

14. The system as claimed in claim 11 wherein the vertical interconnect is between a portion of the first metal layer and a portion of the second metal layer.

15. The system as claimed in claim 11 wherein the protective layer is between a portion of the second metal layer and another portion of the second metal layer.

16. The system as claimed in claim 11 wherein:

the insulation layer is directly on the component attachment pad and the first redistribution layer;

the second metal layer includes a system attachment pad and a second redistribution layer directly on the insulation layer; and

the protective layer is directly on the system attachment pad and the second redistribution layer, the protective layer exposing a portion of the system attachment pad for directly attaching to the external interconnect.

17. The system as claimed in claim 16 wherein the component attachment pad has the characteristics of the insulation layer removed.

18. The system as claimed in claim 16 wherein the protective layer is a solder resist material.

19. The system as claimed in claim 16 wherein the vertical interconnect forms an electrical connection between a portion of the first metal layer and a portion of the second metal layer.

20. The system as claimed in claim 16 wherein the protective layer is between a portion of the second redistribution layer and another portion of the second redistribution layer.