Bump-on-lead flip chip interconnection
View Patent ↗A semiconductor device has a semiconductor die with a plurality of bumps formed over the die. A substrate has a plurality of conductive traces formed on the substrate. Each trace has an interconnect site for mating to the bumps. The interconnect sites have parallel edges along a length of the conductive traces under the bumps from a plan view for increasing escape routing density. The bumps have a noncollapsible portion for attaching to a contact pad on the die and fusible portion for attaching to the interconnect site. The fusible portion melts at a temperature which avoids damage to the substrate during reflow. The noncollapsible portion includes lead solder, and fusible portion includes eutectic solder. The interconnect sites have a width which is less than 1.2 times a width of the conductive trace. Alternatively, the interconnect sites have a width which is less than one-half a diameter of the bump.
1. A method of forming a semiconductor device, comprising:
providing a semiconductor die;
forming a plurality of bumps over the semiconductor die;
providing a substrate; and
forming a plurality of conductive traces on the substrate, each trace having an interconnect site for mating to the bumps, the interconnect sites having parallel edges with a width which is less than one-half a diameter of the bump, wherein one of the bumps has a noncollapsible portion for attaching to a contact pad on the semiconductor die and a fusible portion for attaching to the interconnect site.
2. The method of claim 1 , wherein the noncollapsible portion includes lead solder and the fusible portion includes eutectic solder.
3. The method of claim 1 , wherein the fusible portion melts at a temperature which avoids damage to the substrate during reflow.
4. The method of claim 1 , wherein one of the bumps contacts a sidewall of one of the interconnect sites.
5. The method of claim 1 , further including disposing an underfill material between the semiconductor die and substrate.
6. The method of claim 1 , wherein the interconnect sites have a width which is less than 1.2 times a width of the conductive trace.
7. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming a bump over the semiconductor die; and
providing a substrate having a conductive trace formed on a die attach surface of the substrate for mating to the bump, the conductive trace having an interconnect site with a width which is less than one-half a diameter of the bump, wherein the bump has a noncollapsible portion including lead solder for attaching to a contact pad on the semiconductor die and a fusible portion including eutectic solder for attaching to the interconnect site.
8. The method of claim 7 , wherein the fusible portion melts at a temperature which avoids damage to the substrate during reflow.
9. The method of claim 7 , further including disposing an underfill material between the semiconductor die and substrate.
10. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming a bump over the semiconductor die; and
providing a substrate having a conductive trace formed on a die attach surface of the substrate, the conductive trace having an interconnect site for mating with the bump, the interconnect site having a width less than one-half a width of the bump, wherein the bump has a noncollapsible portion for attaching to a contact pad on the semiconductor die and a fusible portion for attaching to the interconnect site.
11. The method of claim 10 , wherein the fusible portion melts at a temperature which avoids damage to the substrate during reflow.
12. The method of claim 10 , wherein the noncollapsible portion includes lead solder and the fusible portion includes eutectic solder.
13. The method of claim 10 , wherein the bump contacts a sidewall of the interconnect site.
14. A semiconductor device, comprising:
a semiconductor die;
a plurality of bumps formed over the semiconductor die;
a substrate; and
a plurality of conductive traces formed on the substrate, each trace having an interconnect site for mating to the bumps, the interconnect sites having parallel edges with a width less than one-half a width of the bumps, wherein one of the bumps has a noncollapsible portion for attaching to a contact pad on the semiconductor die and a fusible portion for attaching to the interconnect site.
15. The semiconductor device of claim 14 , wherein the noncollapsible portion includes lead solder.
16. The semiconductor device of claim 14 , wherein the fusible portion includes eutectic solder.
17. The semiconductor device of claim 14 , wherein the interconnect sites have a width which is less than 1.2 times a width of the conductive trace.
18. The semiconductor device of claim 14 , wherein the bumps have a pitch as determined by a spacing between adjacent conductive traces that can be achieved on the substrate.
19. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming a plurality of bumps over a surface of the semiconductor die, each one of the bumps including a non-collapsible portion and a fusible portion;
providing a substrate;
forming a plurality of conductive traces including interconnect sites over a surface of the substrate, wherein a width of the interconnect sites is less than one-half a width of the bumps; and
bonding the fusible portion of the bumps to a surface of the interconnect sites by deforming the fusible portion against the interconnect sites while the non-collapsible portion of the bumps maintains vertical standoff between the semiconductor die and substrate.
20. The method of claim 19 , wherein the non-collapsible portion of the bumps includes lead solder for attaching to a contact pad on the semiconductor die and the fusible portion of the bumps includes eutectic solder for attaching to the surface of the interconnect sites.
21. The method of claim 19 , further including depositing an underfill material between the semiconductor die and substrate.
22. The method of claim 19 , wherein the fusible portion of one of the bumps contacts a sidewall of one of the interconnect sites.
23. A method of making a semiconductor device, comprising:
providing a semiconductor die;
forming a bump over a surface of the semiconductor die, the bump including a non-collapsible portion and a fusible portion;
providing a substrate;
forming an interconnect site over a surface of the substrate, wherein a width of the interconnect site is less than one-half a width of the bump; and
bonding the fusible portion of the bump to a surface of the interconnect site, the non-collapsible portion of the bump maintaining vertical standoff between the semiconductor die and substrate.
24. The method of claim 23 , wherein the non-collapsible portion of the bump includes lead solder for attaching to a contact pad on the semiconductor die.
25. The method of claim 23 , wherein the fusible portion of the bump includes eutectic solder for attaching to the surface of the interconnect site.
26. The method of claim 23 , further including depositing an underfill material between the semiconductor die and substrate.
27. The method of claim 23 , wherein the fusible portion of the bump contacts a sidewall of the interconnect site.
28. A method of making a semiconductor device, comprising:
providing a semiconductor die;
providing a substrate having an interconnect site formed over a surface of the substrate;
providing a bump having a non-collapsible portion and a fusible portion, wherein a width of the interconnect site is less than one-half a width of the bump; and
bonding the bump between the surface of the substrate and a surface of the interconnect site, the non-collapsible portion of the bump maintaining vertical standoff between the semiconductor die and substrate.
29. The method of claim 28 , wherein the non-collapsible portion of the bump includes lead solder for attaching to a contact pad on the semiconductor die.
30. The method of claim 28 , wherein the fusible portion of the bump includes eutectic solder for attaching to the surface of the interconnect site.
31. The method of claim 28 , further including depositing an underfill material between the semiconductor die and substrate.
32. The method of claim 28 , wherein the fusible portion of the bump contacts a sidewall of the interconnect site.
33. A semiconductor device, comprising:
a semiconductor die;
a substrate having an interconnect site formed over a surface of the substrate; and
a bump having a non-collapsible portion and a fusible portion, wherein the bump is bonded between the interconnect site and the semiconductor die, the non-collapsible portion of the bump maintaining vertical standoff between the semiconductor die and substrate, wherein a width of the interconnect site is less than one-half a width of the bump.
34. The semiconductor device of claim 33 , wherein the non-collapsible portion of the bump includes lead solder for attaching to a contact pad on the semiconductor die and the fusible portion of the bump includes eutectic solder for attaching to a surface of the interconnect site.
35. The semiconductor device of claim 33 , further including an underfill material deposited between the semiconductor die and substrate.
36. The semiconductor device of claim 33 , wherein the fusible portion of the bump contacts a sidewall of the interconnect site.