Granted Patent B2

US 8,970,187 · App. 13/773,608 · Granted Mar 3, 2015

Abstract

Claims (40)

1. A voltage generator, comprising:

an operational amplifier having a first input terminal, a second input terminal, and an output terminal, the first input terminal receiving an input voltage, and receiving and adjusting an offset voltage of the operational amplifier according to a control signal;

an offset voltage tuner coupled to the operational amplifier, the offset voltage tuner providing the control signal; and

an output stage circuit coupled to the output terminal and the second input terminal of the operational amplifier, the output stage circuit generating an output voltage according to a voltage on the output terminal of the operational amplifier, and providing the output voltage to the second input terminal of the operational amplifier,

wherein the operational amplifier comprises:

a differential input circuit coupled to a first reference voltage, the differential input circuit having a first input stage circuit and a second input stage circuit, wherein the conductive resistors of the first and second input stage circuits are adjusted according to the control signal in order to adjust the offset voltage; and

a load circuit coupled between the differential input circuit and a second reference voltage, wherein a contact of one of the load circuit and the differential input circuit is coupled to the output terminal of the operational amplifier.

2. The voltage generator of claim 1 , wherein the first input stage circuit comprises:

a first transistor having a first terminal, a second terminal, and a control terminal, the control terminal of the first transistor receiving the input voltage, the first terminal of the first transistor coupled to the load circuit, and the second terminal of the first transistor coupled to the second reference voltage; and

at least one first tuning transistor, the first tuning transistor having a first terminal, a second terminal, and a control terminal, the control terminal of the first tuning transistor receiving the control signal, the first terminal of the first tuning transistor coupled to the first terminal of the first transistor, and the second terminal of the first tuning transistor coupled to the second terminal of the first transistor.

3. The voltage generator of claim 2 , wherein the second input stage circuit comprises:

a second transistor having a first terminal, a second terminal, and a control terminal, the control terminal of the second transistor receiving the input voltage, the first terminal of the second transistor coupled to the load circuit, and the second terminal of the second transistor coupled to the second reference voltage; and

at least one second tuning transistor, the second tuning transistor having a first terminal, a second terminal, and a control terminal, the control terminal of the second tuning transistor receiving the control signal, the first terminal of the second tuning transistor coupled to the first terminal of the second transistor, and the second terminal of the second tuning transistor coupled to the second terminal of the second transistor.

4. The voltage generator of claim 1 , wherein the second input stage circuit comprises:

a first transistor having a first terminal, a second and a control terminal, the control terminal of the first transistor receiving the input voltage, the first terminal of the first transistor coupled to the load circuit, and the second terminal of the first transistor coupled to the second reference voltage; and

at least one first tuning transistor, the first tuning transistor having a first terminal, a second terminal, and a control terminal, the control terminal of the first tuning transistor receiving the control signal, the first terminal of the first tuning transistor coupled to the first terminal of the first transistor, and the second terminal of the first tuning transistor coupled to the second terminal of the first transistor.

5. The voltage generator of claim 1 , wherein the load circuit comprises:

a first resistor and a second resistor, the first resistor connected in series between the first input stage circuit and the first reference voltage, and the second resistor connected in series between the second input stage circuit and the first reference voltage.

6. The voltage generator of claim 1 , wherein the load circuit comprises:

a first transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the first transistor coupled to the first reference voltage, and the second terminal of the first transistor coupled to the first input stage circuit; and

a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor coupled to the first reference voltage, the second terminal of the second transistor coupled to the second input stage circuit and the control terminal of the second transistor, and the control terminal of the second transistor coupled to the control terminal of the first transistor.

7. The voltage generator of claim 6 , wherein a channel width to length ratio of the first transistor and/or the second transistor is adjusted according to the control signal.

8. The voltage generator of claim 1 , wherein the offset voltage tuner comprises:

a plurality of first voltage selectors coupled to the operational amplifier, the first voltage selectors generating a first control signal in the control signal according to a selection of the second reference voltage or the input voltage; and

a plurality of second voltage selectors coupled to the operational amplifier, the second voltage selectors generating a second control signal in the control signal according to a selection of the second reference voltage or the output voltage,

wherein the first control signal is transmitted to the first input stage circuit, and the second control signal is transmitted to the second input stage circuit.

9. The voltage generator of claim 1 , wherein the operational amplifier comprises:

a differential input circuit coupled to the first reference voltage, the differential input circuit having a first input stage circuit and a second input stage circuit; and

a load circuit coupled between the differential input circuit and the second reference voltage, wherein the load circuit respectively provides a first impedance and a second impedance to the first and second input stage circuits, wherein the first and second impedances are respectively adjusted according to the control signal.

10. The voltage generator of claim 9 , wherein the load circuit comprises:

a first transistor having a first a second and a control terminal, the first terminal of the first transistor coupled to the first reference voltage, and the second terminal of the first transistor coupled to the first input stage circuit,

wherein a channel width to length ratio of the first transistor is adjusted according to the control signal.

11. The voltage generator of claim 10 , wherein the load circuit further comprises:

a second transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second transistor coupled to the first reference voltage, the second terminal of the second transistor coupled to the second input stage circuit and the control terminal of the second transistor, and the control terminal of the second transistor coupled to the control terminal of the first transistor,

wherein a channel width to length ratio of the second transistor is adjusted according to the control signal.

12. The voltage generator of claim 9 , wherein the offset voltage tuner generates the control signal having at least one bit.

13. The voltage generator of claim 1 , wherein the operational amplifier is a transconductance amplifier.

14. The voltage generator of claim 1 , wherein the output stage circuit comprises:

a first output stage transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the first output stage transistor receiving the first reference voltage, the second terminal of the first output stage transistor generating the output voltage, and the control terminal of the first output stage transistor coupled to the output terminal of the operational amplifier; and

a second output stage transistor having a first terminal, a second terminal, and a control terminal, the first terminal of the second output stage transistor generating the output voltage, the second terminal final of the second output stage transistor coupled to the second reference voltage, and the control terminal of the second output stage transistor receiving an offset voltage.

Assignments (17)