IP Library Granted Patent US 9,507,406
Granted Patent B2
US 9,507,406 · App. 13/786,042 · Granted Nov 29, 2016

Configuring power domains of a microcontroller system

Inventors: Frode Milch Pedersen (Trondheim, NO); Ronan Barzic (Tiller, NO); Patrice Menard (Saint-Mars-du-Desert, FR); Mickael Le Dily (Carquefou, FR); Thierry Gourbilleau (Le Loroux-Bottereau, FR); Morten Werner Lund (Flatåsen, NO)
Assignee: Atmel Corporation
G06F1/3243G06F1/3287Y02B60/1239Y02B60/1282Y02B60/32
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Quick Facts
Patent No.
US 9,507,406
App. No.
13/786,042
Granted
Nov 29, 2016
Kind
B2
Abstract

A microcontroller system is organized into power domains. A power manager of the microcontroller system can change the power configuration of a power domain in response to event from an event generating module without activating a processor of the microcontroller system.

Claims (53)

1. A microcontroller system comprising:

a processor;

a power manager coupled to the processor; and

an event generating module coupled to the power manager;

wherein the microcontroller system is organized into a plurality of power domains, including a first power domain including the processor and a second power domain different from the first power domain, the event generating module being in a different power domain from the processor and the second power domain, the power manager being in a different power domain from the processor, the event generating module, and the second power domain; and

wherein the power manager is configured to perform operations comprising:

powering down the first power domain so that the processor is inactive;

receiving an event from the event generating module, the event being associated with the event generating module and independent of a power state of the processor; and

in response to receiving the event from the event generating module and prior to activating the processor, changing the second power domain from a prior power configuration to a new power configuration, independent of the power state of the processor.

2. The microcontroller system of claim 1 , the operations further comprising:

receiving a different event from a different module of the second power domain; and

returning the second power domain to the prior power configuration.

3. The microcontroller system of claim 1 , the operations further comprising:

receiving a different event from a different module of the second power domain; and

in response to receiving the different event, changing a third power domain from a different prior power configuration to a different new power configuration.

4. The microcontroller system of claim 3 , the operations further comprising:

in response to receiving the different event, powering up the first power domain so that the processor is active.

5. The microcontroller system of claim 1 , wherein changing the second power domain from a prior power configuration to a new power configuration comprises activating at least one different module so that the different module can perform one or more actions.

6. The microcontroller system of claim 1 , wherein the event generating module is a Real Time Counter (RTC) configured to periodically send the event to the power manager.

7. The microcontroller system of claim 6 , further comprising an analog to digital converter (ADC) in the second power domain, and wherein changing the second power domain from a prior power configuration to a new power configuration comprises activating the second power domain so that the ADC can perform an analog to digital conversion.

8. The microcontroller system of claim 7 , wherein the operations further comprise:

receiving an end of conversion event from the ADC;

in response to receiving the end of conversion event, powering up the first power domain so that the processor is active;

receiving a signal from a user interface of the power manager to power down the first power domain and the second power domain; and

in response to receiving the signal from the user interface, powering down the first power domain and the second power domain.

9. The microcontroller system of claim 1 , wherein the power manager is in a third power domain and the event generating module is in a fourth power domain.

10. A method performed by a power manager of a microcontroller system, the microcontroller system comprising a processor coupled to the power manager and an event generating module coupled to the power manager, the method comprising:

powering down a first power domain of the microcontroller system, the first power domain including the processor, so that the processor is inactive;

receiving an event from the event generating module, the event generating module being in a different power domain from the processor, the event being associated with the event generating module and independent of a power state of the processor;

in response to receiving the event from the event generating module and prior to activating the processor, changing a second power domain of the microcontroller system from a prior power configuration to a new power configuration, independent of the power state of the processor, the second power domain being different from the first power domain and the power domain including the event generating module, the power manager being in a different power domain from the processor, the event generating module, and the second power domain.

11. The method of claim 10 , further comprising:

receiving a different event from a different module of the second power domain; and

returning the second power domain to the prior power configuration.

12. The method of claim 10 , further comprising:

receiving a different event from a different module of the second power domain; and

in response to receiving the different event, changing a third power domain from a different prior power configuration to a different new power configuration.

13. The method of claim 12 , further comprising:

in response to receiving the different event, powering up the first power domain so that the processor is active.

14. The method of claim 10 , wherein changing the second power domain from a prior power configuration to a new power configuration comprises activating at least one different module so that the different module can perform one or more actions.

15. The method of claim 10 , wherein the event generating module is a Real Time Counter (RTC) configured to periodically send the event to the power manager.

16. The method of claim 15 , wherein the microcontroller system further comprises an analog to digital converter (ADC) in the second power domain, and wherein changing the second power domain from a prior power configuration to a new power configuration comprises activating the second power domain so that the ADC can perform an analog to digital conversion.

17. The method of claim 16 , further comprising:

receiving an end of conversion event from the ADC;

in response to receiving the end of conversion event, powering up the first power domain so that the processor is active;

receiving a signal from a user interface of the power manager to power down the first power domain and the second power domain; and

in response to receiving the signal from the user interface, powering down the first power domain and the second power domain.

18. The method of claim 10 , wherein the power manager is in a third power domain and the event generating module is in a fourth power domain.

19. The microcontroller system of claim 7 , the operations further comprising:

receiving an end of a specified number of conversion events from the ADC; and

in response to receiving the end of the specified number of conversion events, powering down the second power domain so that the ADC enters a power saving mode and powering up the first power domain so that the processor is active.

20. The method of claim 16 , further comprising:

receiving an end of a specified number of conversion events from the ADC; and

in response to receiving the end of the specified number of conversion events, powering down the second power domain so that the ADC enters a power saving mode and powering up the first power domain so that the processor is active.

Assignments (19)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2013
From: MENARD, PATRICE; DILY, MICKAEL LE; GOURBILLEAU, THIERRY
To: ATMEL NANTES S.A.S
Reel/Frame 030425/0026 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2013
From: PEDERSEN, FRODE MILCH; BARZIC, RONAN; LUND, MORTEN WERNER
To: ATMEL CORPORATION
Reel/Frame 030424/0427 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 9, 2013
From: ATMEL NANTES S.A.S.
To: ATMEL CORPORATION
Reel/Frame 030181/0767 →
Continuity (2)
Provisional Application 61704051 · Sep 21, 2012
Related Publication 20140089714A1 · Mar 27, 2014