IP Library Granted Patent US 8,951,834
Granted Patent B1
US 8,951,834 · App. 13/931,295 · Granted Feb 10, 2015

Methods of forming solder balls in semiconductor packages

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Quick Facts
Patent No.
US 8,951,834
App. No.
13/931,295
Granted
Feb 10, 2015
Kind
B1
Abstract

Methods of forming solder balls for semiconductor packages using film-assisted molding include providing a substrate, forming a plurality of solder balls on the substrate where each solder ball has an initial profile, and coupling a substantially planar film to the solder balls. As an encapsulation is deposited over the substrate and around the solder balls, the substantially planar film and the encapsulation, along with the molding process, can cause each solder ball to morph from its initial profile to a final profile, where the final profile is generally different from the initial profile.

Claims (46)

1. A method comprising:

(a) providing a substrate;

(b) forming an interconnect structure on the substrate, wherein the interconnect structure includes an initial profile and an interconnect height;

(c) providing a substantially planar film;

(d) coupling the substantially planar film to the interconnect structure; and

(e) concomitant to the coupling step (d), depositing an encapsulation over the substrate and around the interconnect structure, wherein at least one of the encapsulation and the substantially planar film is operable to altering the interconnect structure from the initial profile to a final profile, wherein the final profile is different from the initial profile and an encapsulation height less than the interconnect height.

2. The method of claim 1 , further comprising forming an integrated circuit on the substrate adjacent the interconnect structure concomitant to the forming step (b), wherein the integrated circuit and the encapsulation are substantially coplanar after the depositing step (e).

3. The method of claim 1 , wherein:

the providing step (c) includes providing the substantially planar film having a film thickness, wherein the film thickness is less than the difference between the interconnect height and the encapsulation height.

4. The method of claim 1 , further comprising providing a mold chase for supporting the substantially planar film concomitant to the providing step (c), wherein the mold chase facilitates the coupling of the substantially planar film to the interconnect structure during the coupling step (d).

5. The method of claim 1 , wherein the forming step (b) includes forming the interconnect structure having the initial profile, wherein the initial profile includes at least one of contoured and rounded profile.

6. The method of claim 5 , wherein the depositing step (e) includes altering the interconnect structure to the final profile, wherein the final profile includes at least one of contourless and flattened profile.

7. The method of claim 1 , wherein the providing step (c) includes providing the substantially planar film having a film modulus, wherein the film modulus is less than about 30 GPa.

8. A method comprising:

(a) providing a substrate;

(b) forming an interconnect structure on the substrate, wherein the interconnect structure includes an interconnect height;

(c) providing a substantially planar film having a film thickness;

(d) coupling the substantially planar film to the interconnect structure; and

(e) concomitant to the coupling step (d), depositing an encapsulation over the substrate and around the interconnect structure,

wherein the encapsulation includes an encapsulation height less than the interconnect height,

wherein the film thickness is less than the difference between the interconnect height and the encapsulation height,

wherein at least one of the encapsulation and the substantially planar film is operable to altering the interconnect structure to produce a protrusion, and

wherein the protrusion includes a protrusion height in the range of from about 10% to about 90% of the film thickness.

9. The method of claim 8 , further comprising forming an integrated circuit on the substrate adjacent the interconnect structure concomitant to the forming step (b), wherein the integrated circuit and the encapsulation are substantially coplanar after the depositing step (e).

10. The method of claim 8 , further comprising providing a mold chase for supporting the substantially planar film concomitant to the providing step (c), wherein the mold chase facilitates the coupling of the substantially planar film to the interconnect structure during the coupling step (d).

11. The method of claim 8 , wherein the providing step (c) includes providing the substantially planar film having a film modulus, wherein the film modulus is less than about 10 GPa.

12. The method of claim 8 , wherein the forming step (b) includes forming the interconnect structure on the substrate, wherein the interconnect structure includes at least one of contoured and rounded profile.

13. The method of claim 12 , wherein the depositing step (e) includes altering the interconnect structure to produce the protrusion having at least one of contourless and flattened profile.

14. The method of claim 8 , wherein the altering step (e) includes altering the interconnect structure to produce the protrusion having the protrusion height in the range of from about 40% to about 80% of the film thickness.

15. A method comprising:

(a) providing a substrate;

(b) forming an interconnect structure on the substrate, wherein the interconnect structure includes an interconnect height;

(c) providing a substantially planar film having a film thickness;

(d) coupling the substantially planar film to the interconnect structure; and

(e) concomitant to the coupling step (d), depositing an encapsulation over the substrate and around the interconnect structure,

wherein the encapsulation includes an encapsulation height less than the interconnect height,

wherein the film thickness is substantially equal to or greater than the difference between the interconnect height and the encapsulation height,

wherein at least one of the encapsulation and the substantially planar film is operable to altering the interconnect structure to produce a protrusion, and

wherein the protrusion includes a protrusion height substantially similar to the difference between the interconnect height and the encapsulation height.

16. The method of claim 15 , further comprising forming an integrated circuit on the substrate adjacent the interconnect structure concomitant to the forming step (b), wherein the integrated circuit and the encapsulation are substantially coplanar after the depositing step (e).

17. The method of claim 15 , further comprising providing a mold chase for supporting the substantially planar film concomitant to the providing step (c), wherein the mold chase facilitates the coupling of the substantially planar film to the interconnect structure during the coupling step (d).

18. The method of claim 15 , wherein:

the forming step (b) includes forming the interconnect structure on the substrate, the interconnect structure having an initial profile; and

the depositing step (e) includes altering the interconnect structure to produce the protrusion, the protrusion having a final profile,

wherein the final profile and the initial profile are substantially similar.

19. The method of claim 15 , wherein the providing step (c) includes providing the substantially planar film having a film modulus, wherein the film modulus is less than about 30 GPa.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2025
From: STATS CHIPPAC PTE. LTD.
To: STATS CHIPPAC MANAGEMENT PTE. LTD.
Reel/Frame 072788/0917 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME ON THE COVER SHEET PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0145. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 5, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064806/0001 →
RELEASE OF SECURITY INTEREST Recorded Jun 4, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052844/0491 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0145 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2013
From: KIM, KYUNG MOON; SHIM, IL KWON; CHI, HEEJO; SHIN, HANGIL
To: STATS CHIPPAC LTD.
Reel/Frame 030713/0681 →