Curvilinear wiring structure to reduce areas of high field density in an integrated circuit
View Patent ↗A method for reducing areas of high field density in an integrated circuit is disclosed. In one embodiment, the method includes forming a first curvilinear wiring structure in a first interconnect layer of an integrated circuit. A second curvilinear wiring structure may be formed in a second interconnect layer of the integrated circuit, such that the first and second curvilinear wiring structures are substantially vertically aligned. The first curvilinear wiring structure may then be electrically connected to the second curvilinear wiring structure. A corresponding apparatus and design structure are also described.
1. A method for reducing areas of high field density in an integrated circuit, the method comprising:
forming a first curvilinear wiring structure in a first interconnect layer of an integrated circuit, wherein forming the first curvilinear wiring structure comprises forming a first set of concentric conductive annular structures having a first electrode and a second electrode;
forming a second curvilinear wiring structure in a second interconnect layer of the integrated circuit, wherein the second curvilinear wiring structure is substantially vertically aligned with the first curvilinear wiring structure; and
electrically connecting the first curvilinear wiring structure to the second curvilinear wiring structure, wherein electrically connecting the first curvilinear wiring structure to the second curvilinear wiring structure comprises:
forming a curvilinear conductive via to electrically connect the first curvilinear wiring structure to the second curvilinear wiring structure; and
extending the curvilinear conductive via between the first curvilinear wiring structure and the second curvilinear wiring structure.
2. The method of claim 1 , wherein forming the second curvilinear wiring structure comprises forming a second set of concentric conductive annular structures having a first electrode and a second electrode.
3. The method of claim 2 , wherein extending the curvilinear conductive via between the first curvilinear wiring structure and the second curvilinear wiring structure comprises extending a first curvilinear conductive via between the first electrode of the first set and the first electrode of the second set, and extending a second curvilinear conductive via between the second electrode of the first set and the second electrode of the second set.
4. The method of claim 3 , further comprising positioning the first curvilinear conductive via substantially adjacent to the second curvilinear conductive via along a radius of at least one of the first and second sets of concentric conductive annular structures.
5. The method of claim 3 , further comprising staggering a position of the first curvilinear conductive via relative to the second curvilinear conductive via, such that the first curvilinear conductive via is substantially adjacent and radially offset from the second curvilinear conductive via.
6. The method of claim 1 , wherein forming the curvilinear conductive via comprises shaping a cross-section of the curvilinear conductive via to substantially conform to a curvilinear shape of at least one of the first and second curvilinear wiring structures.