IP Library Granted Patent US 9,772,970
Granted Patent B2
US 9,772,970 · App. 14/014,128 · Granted Sep 26, 2017

Multi-protocol serial communication interface

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Quick Facts
Patent No.
US 9,772,970
App. No.
14/014,128
Granted
Sep 26, 2017
Kind
B2
Abstract

Systems and methods for multi-protocol serial communication interfaces are described. One example system includes an interface module including a buffer for storing a protocol selection. The system includes a protocol module coupled to the interface module and configured for providing one or more serial communication protocols. Based on the protocol selection, one of the serial communication protocols is selected. The system also includes a serial engine module coupled to the interface module and the protocol module. The serial engine module is configured for transmitting and receiving data or commands based on the selected serial communication protocol.

Claims (61)

1. A system comprising:

an interface module including a buffer or register for storing a protocol selection;

a protocol module coupled to the interface module and configured for providing configuration data for one of two or more serial communication protocols based on the protocol selection;

a serial engine module coupled to the interface module and the protocol module, the serial engine module configured for:

determining from the protocol selection that data or commands are to be transmitted and received on a serial communication bus using synchronous communication;

determining that a port control module coupled to the serial communication bus is configured for asynchronous communication on the serial communication bus;

reconfiguring the port control module from asynchronous serial communication to synchronous serial communication on the serial communication bus, including selecting one of an internal or an external clock signal for synchronous communication on the serial communication bus; and

transmitting and receiving data or commands over the serial communication bus synchronously using the clock signal.

2. The system of claim 1 , wherein the serial communication protocols include:

at least one of serial peripheral bus interface protocol or

inter integrated circuit bus interface protocol; and

universal synchronous and asynchronous receiver and transmitter bus interface protocol.

3. The system of claim 1 , wherein the interface module includes:

control and status registers;

a baud register; and

transmit and receive registers.

4. The system of claim 1 , wherein the serial engine module includes:

one or more transmitters for sending data or commands;

one or more receivers for receiving data or commands;

a baud rate generator for generating a baud rate of the system; and

an address module for matching addresses.

5. The system of claim 3 , wherein the interface module receives a protocol selection and the protocol selection is stored in one of the control and status registers, and wherein the interface module selects one of the serial communication protocols based on the stored protocol selection.

6. The system of claim 3 , wherein the interface module receives a baud value and the baud value is stored in the baud register, and wherein the serial engine module is configured to calculate a baud rate based at least in part on the stored baud value.

7. The system of claim 6 , wherein the system is configured to generate an internal clock, and wherein the serial engine module is configured to calculate a baud rate based at least in part on the internal clock.

8. The system of claim 6 , wherein the system is configured to receive an external clock, and wherein the serial engine module is configured to calculate a baud rate based at least in part on the external clock.

9. The system of claim 1 , wherein the system is part of an integrated circuit chip, the integrated chip including a processor, or a controller.

10. The system of claim 1 , wherein the port control module is coupled to the serial engine module and the serial engine module configures the port control module for communicating through communication pins.

11. The system of claim 4 , wherein the address module is configured for:

matching one address with a mask;

matching one address without a mask;

matching two unique addresses; or

matching an address with a range of addresses.

12. A method comprising:

receiving a signal to select a serial communication protocol;

selecting a serial communication protocol, based on the received signal, from a plurality of serial communication protocols for communicating over a serial communication bus;

determining that a serial communication using the selected serial communication protocol is synchronous serial communication;

determining that a port control module coupled to the serial communication bus is configured for asynchronous communication on the serial communication bus;

reconfiguring the port control module from asynchronous serial communication to synchronous serial communication on the serial communication bus, including selecting one of an internal or an external clock signal for synchronous communication on the serial communication bus; and

transmitting or receiving data or commands using the enabled serial bus interface and the selected serial communication protocol.

13. The method of claim 12 , where the received signal is generated by an external module including

a processor, or

a controller.

14. The method of claim 12 , wherein the plurality of serial communication protocols, include:

at least one of serial peripheral bus interface protocol or

inter integrated circuit bus interface protocol, and

universal synchronous and asynchronous receiver and transmitter bus interface protocol.

15. The method of claim 12 , wherein receiving a signal to select a serial communication protocol includes holding the received signal in a memory buffer or register.

16. The method of claim 12 , further comprising:

receiving a baud value, and

calculating a baud rate based at least in part on the baud value.

17. The method of claim 12 , wherein setting a baud rate includes

receiving an external or an internal clock, and

calculating the baud rate based at least in part on the received clock rate.

18. The method of claim 12 , further comprising

extracting an address of packet and matching with

one address without a mask,

one address with a mask,

two distinct addresses, or

a range of addresses.

19. The method of claim 12 , further comprising

configuring a port control module with the selected serial communication protocol, wherein the port control module is coupled to communication pins.

Assignments (18)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: ATMEL CORPORATION
Reel/Frame 059262/0105 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2018
From: ATMEL CORPORATION
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 046874/0877 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: ATMEL CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041715/0747 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL Recorded Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
PATENT SECURITY AGREEMENT Recorded Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2013
From: LUO, YONG; FULLERTON, IAN; FROEMMING, BENJAMIN FRANCIS; LUND, MORTEN WERNER
To: ATMEL CORPORATION
Reel/Frame 031114/0340 →