IP Library Granted Patent US 9,129,849
Granted Patent B2
US 9,129,849 · App. 14/026,117 · Granted Sep 8, 2015

Stacked capacitor structure and a fabricating method for fabricating the same

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Quick Facts
Patent No.
US 9,129,849
App. No.
14/026,117
Granted
Sep 8, 2015
Kind
B2
Abstract

A stacked capacitor structure of the instant disclosure comprises a substrate and a plurality of stacked capacitors. The substrate has an insulating layer formed thereon and a plurality of contact plugs in the insulating layer, wherein the contact plugs are exposed on the upper surface of the insulating layer. Specially, each of the stacked capacitors comprises a lower electrode, a dielectric layer, and an upper electrode. The lower electrode is arranged on one of the contact plugs and has a columnar base portion and a crown shaped upper portion. The dielectric layer is arranged on the lower electrode and covers the outer surface of the lower electrode. The upper electrode is arranged above the lower electrode, wherein the dielectric layer is intermediately between the upper electrode and the lower electrode.

Claims (10)

1. A stacked capacitor structure comprising:

a substrate having an insulating layer formed thereon and a plurality of contact plugs in the insulating layer, wherein the contact plugs are exposed on the upper surface of the insulating layer; and

a plurality of stacked capacitors, each of which comprising:

a lower electrode arranged on one of the contact plugs, wherein the lower electrode has a columnar base portion and a crown shaped upper portion and a middle portion arranged between the columnar base portion and a crown shaped upper portion;

an upper electrode arranged above the lower electrode;

a dielectric layer arranged between the upper electrode and the lower electrode, wherein the dielectric layer covers the outer surface of the lower electrode, the dielectric layer having a height ranging from ⅓ to ½ of a height of the columnar base portion.

2. The capacitor structure according to claim 1 , wherein the middle portion is a metal silicide layer.

3. The capacitor structure according to claim 1 , wherein the height of the columnar base portion ranges from ½ to ¾ of the height of the crown shaped upper portion.

4. The capacitor structure according to claim 1 , wherein the height of the columnar base portion ranges from ⅓ to ½ of the height of the crown shaped upper portion.

5. The capacitor structure according to claim 1 , wherein the contact plugs are arranged in hexagonal, each of the contact plugs has a contact pad exposed on the upper surface of the insulating layer.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050695/0825 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2017
From: INOTERA MEMORIES, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 041820/0815 →
SUPPLEMENT NO. 3 TO PATENT SECURITY AGREEMENT Recorded Feb 10, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041675/0105 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2013
From: LEE, TZUNG-HAN
To: INOTERA MEMORIES, INC.
Reel/Frame 031324/0140 →