IP Library Granted Patent US 9,603,252
Granted Patent B1
US 9,603,252 · App. 14/077,908 · Granted Mar 21, 2017

Integrated circuit device system with elevated configuration and method of manufacture thereof

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Quick Facts
Patent No.
US 9,603,252
App. No.
14/077,908
Granted
Mar 21, 2017
Kind
B1
Abstract

A system and method of manufacture of an integrated circuit device system includes: a carrier having a first side; a base device mounted on the first side; a first riser mounted on the first side; a second riser mounted on the first side and adjacent to the first riser; a peripheral elevated device mounted on the first riser, the peripheral elevated device having a device overhang above the base device; and an inner elevated device mounted on the second riser, the inner elevated device having the device overhang above the base device.

Claims (36)

1. A method of manufacture of an integrated circuit device system comprising:

providing a carrier having a first side;

mounting a base device on the first side;

mounting a first riser, adjacent to the base device, and a second riser, adjacent to a side of the base device opposite the first riser, on the first side;

mounting a peripheral elevated device on the first riser, the peripheral elevated device having a device overhang above the base device; and

mounting an inner elevated device on the second riser, the inner elevated device having the device overhang above the base device.

2. The method as claimed in claim 1 wherein mounting the peripheral elevated device includes mounting the peripheral elevated device having the device overhang of at most half the length of the peripheral elevated device.

3. The method as claimed in claim 1 further comprising mounting a mirrored chip assembly to a second side of the carrier.

4. The method as claimed in claim 1 wherein mounting a first riser includes mounting the first riser having a protrusion portion, the protrusion portion overhanging the base device.

5. The method as claimed in claim 1 wherein mounting the peripheral elevated device includes a device interconnect between the first riser and the peripheral elevated device.

6. A method of manufacture of an integrated circuit device system comprising:

providing a carrier having a first side;

mounting a base device on the first side;

mounting a first riser, adjacent to the base device, and a second riser, adjacent to a side of the base device opposite the first riser, on the first side, the base device between the first riser and the second riser;

mounting a peripheral elevated device on the first riser, the peripheral elevated device having a device overhang above the base device; and

mounting an inner elevated device on the second riser, the inner elevated device having the device overhang above the base device.

7. The method as claimed in claim 6 wherein mounting a first riser can include mounting the first riser having a body portion and a protrusion portion extending from the body portion, the protrusion portion overhanging the base device.

8. The method as claimed in claim 6 further comprising mounting a mirrored chip assembly to a second side of the carrier, the mirrored chip assembly includes a mirrored periphery device, a mirrored first riser, a mirrored base device, a mirrored inner device, and a mirrored second riser.

9. The method as claimed in claim 6 wherein mounting the inner elevated device can include mounting the inner elevated device having the device overhang of at least half the length of the inner elevated device.

10. The method as claimed in claim 6 wherein mounting the peripheral elevated device includes mounting the peripheral elevated device above the inner elevated device.

11. An integrated circuit device system comprising:

a carrier having a first side;

a base device mounted on the first side;

a first riser, mounted on the first side, adjacent to the base device;

a second riser, mounted on the first side, adjacent to a side of the base device opposite the first riser;

a peripheral elevated device mounted on the first riser, the peripheral elevated device having a device overhang above the base device; and

an inner elevated device mounted on the second riser, the inner elevated device having the device overhang above the base device.

12. The system as claimed in claim 11 wherein the peripheral elevated device includes the device overhang of at most half the length of the peripheral elevated device.

13. The system as claimed in claim 11 further comprising a mirrored chip assembly mounted to a second side of the carrier.

14. The system as claimed in claim 11 wherein the first riser includes a protrusion portion, the protrusion portion overhanging the base device.

15. The system as claimed in claim 11 further comprising a device interconnect for attaching the peripheral elevated device to the first riser.

16. The system as claimed in claim 11 wherein the first riser and the second riser include vertical vias.

17. The system as claimed in claim 16 wherein a first riser can include a body portion and a protrusion portion extending from the body portion, the protrusion portion overhanging the base device.

18. The system as claimed in claim 16 further comprising a mirrored chip assembly attached to a second side of the carrier, the mirrored chip assembly includes a mirrored periphery device, a mirrored first riser, a mirrored base device, a mirrored inner device, and a mirrored second riser.

19. The system as claimed in claim 16 wherein the inner elevated device can include the device overhang of at least half of the length of the inner elevated device.

20. The system as claimed in claim 16 wherein the peripheral elevated device is mounted above the inner elevated device.

Assignments (8)
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001 Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
RELEASE OF SECURITY INTEREST Recorded Feb 7, 2022
From: BANK OF AMERICA, N.A., AS AGENT
To: SMART MODULAR TECHNOLOGIES, INC.
Reel/Frame 058913/0385 →
RELEASE OF SECURITY INTEREST AT REEL 043495 FRAME 0397 Recorded Feb 7, 2022
From: BARCLAYS BANK PLC
To: SMART MODULAR TECHNOLOGIES, INC.
Reel/Frame 058963/0479 →
SECURITY INTEREST Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
SECURITY INTEREST Recorded Dec 23, 2020
From: SMART MODULAR TECHNOLOGIES, INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 054738/0855 →
SECURITY AGREEMENT Recorded Aug 9, 2017
From: SMART MODULAR TECHNOLOGIES, INC.
To: BARCLAYS BANK PLC, AS ADMINISTRATIVE AGENT
Reel/Frame 043495/0397 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2013
From: IYER, SATYANARAYAN SHIVKUMAR; CHANG, REUBEN J.; MAHRAN, VICTOR
To: SMART MODULAR TECHNOLOGIES, INC.
Reel/Frame 031586/0282 →