IP Library Granted Patent US 9,235,245
Granted Patent B2
US 9,235,245 · App. 14/135,407 · Granted Jan 12, 2016

Startup performance and power isolation

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,235,245
App. No.
14/135,407
Granted
Jan 12, 2016
Kind
B2
Abstract

The various implementations described herein include systems, methods and/or devices used to protect data in a storage device. In one aspect, a method includes (1) powering a power control processor (PCP) (also sometimes called a storage-level microcontroller) using a first input voltage, (2) while the PCP is powered using the first input voltage: (a) operating the PCP in a first mode, and (b) enabling charging of an energy storage device, (3) after achieving a predefined internal state, which includes the energy storage device charged to a predefined level, powering the PCP using a power supply voltage distinct from the first input voltage, and (4) while the PCP is powered using the power supply voltage, operating the PCP in a second mode, where the PCP operates at a higher performance level in the second mode than in the first mode.

Claims (52)

1. A method of power management in a storage device, the method comprising:

powering a power control processor (PCP) using a first input voltage;

while the PCP is powered using the first input voltage:

operating the PCP in a first mode; and

enabling charging of an energy storage device;

after achieving a predefined internal state, which includes the energy storage device charged to a predefined level, powering the PCP using a power supply voltage distinct from the first input voltage; and

while the PCP is powered using the power supply voltage, operating the PCP in a second mode, wherein the PCP operates at a higher performance level in the second mode than in the first mode.

2. The method of claim 1 , wherein operating at a higher performance level includes operating at a higher frequency.

3. The method of claim 1 , wherein the first input voltage corresponds to a low power communication bus.

4. The method of claim 1 , wherein, while operating in the first mode, the PCP detects presence of components of the storage device.

5. The method of claim 1 , wherein achieving the predefined internal state further includes completing a predefined start-up routine.

6. The method of claim 1 , wherein, while operating in the second mode, the PCP initiates operation of a plurality of power regulators on the storage device.

7. The method of claim 1 , wherein, while operating in the first mode, the PCP enables power to a plurality of power regulators on the storage device.

8. The method of claim 7 , wherein the plurality of power regulators supply power to a plurality of controllers on the storage device.

9. The method of claim 1 , wherein, while operating in the second mode, the PCP enables power to a plurality of controllers on the storage device.

10. The method of claim 1 , wherein, while operating in the second mode, the PCP initiates normal operation of the storage device.

11. The method of claim 1 , wherein, while being powered using the first input voltage, the PCP is incapable of sustained operation at said higher performance level.

12. The method of claim 1 , wherein the energy storage device comprises one or more capacitors.

13. The method of claim 1 , wherein the power supply voltage is generated from a second input voltage.

14. The method of claim 13 , wherein the second input voltage corresponds to a normal power bus.

15. The method of claim 13 , wherein the second input voltage is insufficient to power the PCP directly.

16. The method of claim 1 , wherein the energy storage device is charged using a second input voltage.

17. The method of claim 16 , further comprising, prior to charging the energy storage device, monitoring the second input voltage to determine whether the second input voltage stays within predetermined boundaries.

18. The method of claim 1 , further comprising, while the PCP is powered using the first input voltage:

detecting a unique location associated with the storage device;

determining a time delay for the storage device in accordance with the unique location; and

delaying at least one operation of the PCP by the determined time delay.

19. A storage device, comprising:

an interface for coupling the storage device to a host system;

an energy storage device; and

a power control processor (PCP), the storage device configured to:

power the PCP using a first input voltage;

while the PCP is powered using the first input voltage:

operate the PCP in a first mode; and

charge an energy storage device;

after achieving a predefined internal state, which includes the energy storage device charged to a predefined level, power the PCP using a power supply voltage distinct from the first input voltage; and

while the PCP is powered using the power supply voltage, operate the PCP in a second mode, wherein the PCP operates at a higher frequency in the second mode than in the first mode.

20. The storage device of claim 19 , wherein operating at a higher performance level includes operating at a higher frequency.

21. The storage device of claim 19 , wherein the power supply voltage is generated from a second input voltage.

22. The storage device of claim 21 , wherein the second input voltage corresponds to a normal power bus.

23. The storage device of claim 21 , wherein the second input voltage is insufficient to power the PCP directly.

24. A non-transitory computer readable storage medium, storing one or more programs for execution by one or more processors of a storage device having a plurality of controllers and a power control processor (PCP), the one or more programs including instructions for:

powering a power control processor (PCP) using a first input voltage;

while the PCP is powered using the first input voltage:

operating the PCP in a first mode; and

enabling charging of an energy storage device;

after achieving a predefined internal state, which includes the energy storage device charged to a predefined level, powering the PCP using a power supply voltage distinct from the first input voltage; and

while the PCP is powered using the power supply voltage, operating the PCP in a second mode, wherein the PCP operates at a higher performance level in the second mode than in the first mode.

25. The storage medium of claim 24 , wherein operating at a higher performance level includes operating at a higher frequency.

26. The storage medium of claim 24 , wherein the power supply voltage is generated from a second input voltage.

27. The storage medium of claim 26 , wherein the second input voltage corresponds to a normal power bus.

28. The storage medium of claim 26 , wherein the second input voltage is insufficient to power the PCP directly.

Assignments (11)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT (AR) Recorded Feb 22, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 066648/0284 →
PATENT COLLATERAL AGREEMENT (DDTL) Recorded Feb 22, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 066648/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2024
From: SANDISK TECHNOLOGIES LLC
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 066114/0298 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0948 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2016
From: SANDISK ENTERPRISE IP LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038295/0225 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2014
From: LUCAS, GREGG S.; DELPAPA, KENNETH B.; ELLIS, ROBERT W.
To: SANDISK ENTERPRISE IP LLC
Reel/Frame 032041/0919 →