IP Library Granted Patent US 9,122,636
Granted Patent B2
US 9,122,636 · App. 14/135,417 · Granted Sep 1, 2015

Hard power fail architecture

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Quick Facts
Patent No.
US 9,122,636
App. No.
14/135,417
Granted
Sep 1, 2015
Kind
B2
Abstract

The various implementations described herein include systems, methods and/or devices used to enable power sequencing and data hardening in a storage device. In one aspect, the method includes determining whether a power supply voltage provided to the storage device is higher than an over-voltage threshold. The method further includes, in accordance with a determination that the power supply voltage is higher than the over-voltage threshold, performing a power fail operation, the power fail operation including: (1) signaling a power fail condition to a plurality of controllers on the storage device, (2) transferring data held in volatile memory to non-volatile memory, and (3) removing power from the plurality of controllers on the storage device.

Claims (63)

1. A method of protecting data in a storage device, the method comprising:

determining whether a power supply voltage provided to the storage device is higher than an over-voltage threshold; and

in accordance with a determination that the power supply voltage is higher than the over-voltage threshold, performing a power fail operation, the power fail operation including:

signaling a power fail condition to a plurality of controllers on the storage device;

transferring data held in volatile memory to non-volatile memory; and

removing power from the plurality of controllers on the storage device.

2. The method of claim 1 , wherein the plurality of controllers on the storage device include a storage controller and one or more non-volatile memory (NVM) controllers, the one or more NVM controllers coupled by the storage controller to a host interface of the storage device.

3. The method of claim 2 , wherein transferring data held in volatile memory to non-volatile memory includes:

transferring data from the storage controller to the one or more NVM controllers; and

transferring data from the one or more NVM controllers to the non-volatile memory.

4. The method of claim 3 , wherein removing power from the plurality of controllers on the storage device includes:

resetting the storage controller subsequent to transferring data from the storage controller to the one or more NVM controllers; and

removing power from the storage controller subsequent to resetting the storage controller.

5. The method of claim 3 , wherein the one or more NVM controllers include a first NVM controller and a second NVM controller, and wherein removing power from the plurality of controllers on the storage device includes:

resetting the first NVM controller subsequent to transferring data from the first NVM controller to the non-volatile memory;

resetting the second NVM controller subsequent to transferring data from the second NVM controller to the non-volatile memory; and

removing power from the first and the second NVM controllers subsequent to resetting the first and second NVM controllers.

6. The method of claim 5 , wherein removing power from the first and the second NVM controllers is subsequent to removing power from the storage controller.

7. The method of claim 1 , wherein the power fail operation is performed to completion regardless of whether the power supply voltage returns to a voltage lower than or equal to the over-voltage threshold.

8. The method of claim 1 , wherein the power supply voltage is a voltage supplied by a host system.

9. The method of claim 1 , wherein the power supply voltage is a voltage supplied for serial presence detect (SPD) functionality.

10. The method of claim 1 , wherein the power supply voltage includes a first voltage and a second voltage, and wherein performing the power fail operation includes:

performing the power fail operation in accordance with a determination that the first voltage is higher than a first over-voltage threshold; and

performing the power fail operation in accordance with a determination that the second voltage is higher than a second over-voltage threshold.

11. The method of claim 1 , wherein the power fail operation is performed using power from a reserve energy storage device.

12. The method of claim 1 , wherein the power fail operation is performed using power from an energy storage device on the storage device.

13. The method of claim 12 , wherein the energy storage device includes one or more capacitors.

14. The method of claim 12 , further comprising:

monitoring the energy storage device to ensure capacitors in the energy storage device are charged to at least a first charge level; and

selectively testing one or more capacitors from the energy storage device during operation of the storage device.

15. The method of claim 12 , further comprising:

prior to determining whether the power supply voltage provided to the storage device is higher than the over-voltage threshold:

charging the energy storage device using a higher voltage than the power supply voltage provided to the storage device;

determining whether the energy storage device meets a minimum charge level threshold within a predefined charge time; and

in accordance with a determination that the energy storage device does not meet the minimum charge level threshold in the predefined charge time, preventing operation of the storage device.

16. The method of claim 15 , wherein preventing operation of the storage device includes communicating a failure message to a host system.

17. The method of claim 12 , further comprising discharging the energy storage device subsequent to removing power from the plurality of controllers on the storage device.

18. The method of claim 1 , wherein the non-volatile memory comprises one or more NVM devices.

19. The method of claim 1 , wherein the storage device includes a dual in-line memory module (DIMM) device.

20. The method of claim 1 , wherein the plurality of controllers on the storage device include at least one non-volatile storage controller and at least one other storage controller other than the at least one non-volatile storage controller.

21. The method of claim 1 , wherein one of the plurality of controllers on the storage device maps double data rate (DDR) interface commands to serial advance technology attachment (SATA) interface commands.

22. The method of claim 1 , wherein the over-voltage threshold is programmable.

23. The method of claim 1 , wherein signaling the power fail condition to the plurality of controllers on the storage device includes separately signaling the power fail condition to each of the plurality of controllers.

24. The method of claim 1 , further comprising recording data regarding the power fail operation to non-volatile memory.

25. The method of claim 1 , further comprising performing a power fail test operation, the power fail test operation including:

signaling the power fail condition to one or more controllers of the plurality of controllers on the storage device;

for the one or more controllers, transferring data held in volatile memory to non-volatile memory;

removing power from the one or more controllers on the storage device; and

recording data regarding the power fail test operation.

26. A storage device, comprising:

an interface for coupling the storage device to a host system;

a plurality of controllers, each of the plurality of controllers configured to transfer data held in volatile memory to non-volatile memory; and

a data hardening module including an energy storage device, the data hardening module configured to:

determine whether a power supply voltage provided to the storage device is higher than an over-voltage threshold; and

in accordance with a determination that the power supply voltage is higher than the over-voltage threshold, perform a power fail operation, the power fail operation including:

signaling a power fail condition to the plurality of controllers, causing the plurality of controllers to transfer data held in volatile memory to non-volatile memory; and

removing power from the plurality of controllers on the storage device.

27. A non-transitory computer readable storage medium, storing one or more programs for execution by one or more processors of a storage device having a plurality of controllers and a data hardening module, the one or more programs including instructions that when executed cause the storage device to:

determine whether a power supply voltage provided to the storage device is higher than an over-voltage threshold; and

in accordance with a determination that the power supply voltage is higher than the over-voltage threshold, perform a power fail operation, the power fail operation including:

signaling a power fail condition to a plurality of controllers on the storage device;

transferring data held in volatile memory to non-volatile memory; and

removing power from the plurality of controllers on the storage device.

Assignments (11)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT (AR) Recorded Feb 22, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 066648/0284 →
PATENT COLLATERAL AGREEMENT (DDTL) Recorded Feb 22, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 066648/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2024
From: SANDISK TECHNOLOGIES LLC
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 066114/0298 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0948 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2016
From: SANDISK ENTERPRISE IP LLC
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038295/0225 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 24, 2014
From: LUCAS, GREGG S.; DELPAPA, KENNETH B.; HERMAN, LACE J.; ELLIS, ROBERT W.
To: SANDISK ENTERPRISE IP LLC
Reel/Frame 032040/0677 →