Continuous adaptive training for data interface timing calibration
View Patent ↗Circuits and methods for implementing a continuously adaptive timing calibration training function in an integrated circuit interface are disclosed. A mission data path is established where a data bit is sampled by a strobe. A similar reference data path is established for calibration purposes only. At an initialization time both paths are calibrated and a delta value between them is established. During operation of the mission path, the calibration path continuously performs calibration operations to determine if its optimal delay has changed by more than a threshold value. If so, the new delay setting for the reference path is used to change the delay setting for the mission path after adjustment by the delta value. Circuits and methods are also disclosed for performing multiple parallel calibrations for the reference path to speed up the training process.
1. A data interface circuit, comprising:
a calibration controller circuit;
two parallel data capture paths that capture a common data bit value, where each path includes a programmable DLL controlled by the calibration controller, said two data capture paths comprising a mission path that performs data capture for a functional circuit, and a reference path that performs data capture solely for calibration purposes;
wherein one programmable DLL delays the common data bit for the mission path and one DLL delays the common data bit for the reference path; and
wherein the data interface circuit is capable of performing continuous timing calibration and is operated by a method comprising:
performing an initial calibration operation for both reference and mission paths to establish optimal delay settings, and determining a delta value between the optimal delay settings for the reference and mission paths;
operating the functional circuit including operation of the mission path;
from time to time and without interfering with operation of the functional circuit or the mission path, performing an additional calibration of the reference data path to determine a new optimal delay setting for the reference path; and
if the new optimal delay setting for the reference data path differs from a previous delay setting by an amount greater than a change threshold value, setting the delay setting for the mission path to be equal to the new optimal delay setting for the reference path adjusted by the delta value.
2. The circuit of claim 1 , wherein operation of the circuit further comprises:
for the initial calibration of the mission path, performing a sweep of the mission path DLL from a start point to an end point, wherein the end point of the sweep is determined by detecting a transition on the captured data bit value, wherein the captured data bit value comprises the common data bit value.
3. The circuit of claim 2 , wherein operation of the circuit further comprises:
choosing a calibration timing delay value based on the sweep end point that is different from a delay value corresponding to that of the sweep end point.
4. The circuit of claim 2 , wherein to detect a transition on the captured data bit value, the transition must be separated from a previously detected transition by at least a number of delay line increments equal to a predetermined jitter threshold value.
5. The circuit of claim 1 , wherein operation of the circuit further comprises:
for the initial and subsequent calibrations of the reference path, performing a sweep of the reference path DLL from a start point to an end point, wherein the sweep end point is determined by detecting a transition on the captured data bit value.
6. The circuit of claim 5 , wherein operation of the circuit further comprises:
choosing a calibration timing delay value based on the sweep end point that is different from a delay value corresponding to that of the sweep end point.
7. The circuit of claim 5 , wherein to detect a transition on the captured data bit value, the transition must be separated from a previously detected transition by at least a number of delay line increments equal to a predetermined jitter threshold value.
8. A data interface circuit, comprising:
a calibration controller circuit;
two parallel data capture paths that capture a common data bit value, where each path includes a programmable DLL controlled by the calibration controller, said two data capture paths comprising a mission path that performs data capture for a functional circuit, and a reference path that performs data capture solely for calibration purposes;
wherein one programmable DLL delays a capture strobe for the mission path and one DLL delays a capture strobe for the reference path; and
wherein the data interface circuit is capable of performing continuous timing calibration and is operated by a method comprising:
performing an initial calibration operation for both reference and mission paths to establish optimal delay settings, and determining a delta value between the optimal delay settings for the reference and mission paths;
operating the functional circuit including operation of the mission path;
from time to time and without interfering with operation of the functional circuit or the mission path, performing an additional calibration of the reference path to determine a new optimal delay setting for the reference path; and
if the new optimal delay setting for the reference data path differs from a previous delay setting by an amount greater than a change threshold value, setting the delay setting for the mission path to be equal to the new optimal delay setting for the reference path adjusted by the delta value.
9. The circuit of claim 8 , wherein operation of the circuit further comprises:
for the initial calibration of the mission path, performing a sweep of the mission path DLL from a start point to an end point, wherein the end point of the sweep is determined by detecting a transition on the captured data bit value.
10. The circuit of claim 9 , wherein operation of the circuit further comprises:
choosing a calibration timing delay value based on the sweep end point that is different from a delay value corresponding to that of the sweep end point.
11. The circuit of claim 9 , wherein to detect a transition on the captured data bit value, the transition must be separated from a previously detected transition by at least a number of delay line increments equal to a predetermined jitter threshold value.
12. The circuit of claim 8 , wherein operation of the circuit further comprises:
for the initial and subsequent calibrations of the reference path, performing a sweep of the reference path DLL from a start point to an end point, wherein the sweep end point is determined by detecting a transition on the captured data bit value.
13. The circuit of claim 12 , wherein operation of the circuit further comprises:
choosing a calibration timing delay value based on the sweep end point that is different from a delay value corresponding to that of the sweep end point.
14. The circuit of claim 12 , wherein to detect a transition on the captured data bit value, the transition must be separated from a previously detected transition by at least a number of delay line increments equal to a predetermined jitter threshold value.
15. A circuit for implementing a continuous timing calibration function for a data interface, comprising:
a calibration controller circuit;
two parallel data capture circuits that capture a common data bit value, where each data capture circuit includes at least one programmable DLL controlled by the calibration controller, said two parallel data capture circuits comprising a mission path that performs data capture for a functional circuit, and a reference path that performs data capture solely for calibration purposes; and
wherein an initial calibration is performed for both reference and mission paths to establish optimal initial delay settings, and a delta value between the optimal delay settings of the reference and mission paths is determined;
wherein the functional circuit operates including operation of the mission path;
wherein from time to time during operation of the functional circuit, and without interfering with operation of the functional circuit or the mission path, an additional calibration operation is performed for the reference path to determine a new optimal delay setting; and
wherein if a new optimal delay setting for the reference data path differs from a previous optimal delay setting by an amount greater than a change threshold value, the delay setting for the mission path is set to a value that is equal to the new optimal delay setting for the reference path adjusted by the delta value.
16. The circuit of claim 15 , wherein the common data bit is programmably delayed for each of both the mission and reference paths, and data bit delays for both mission and reference paths are controlled by the calibration controller.
17. The circuit of claim 15 , wherein a capture strobe is programmably delayed for each of both the mission and reference paths, and delays for both mission and reference paths are controlled by the calibration controller.
18. The circuit of claim 15 , wherein during a calibration operation of either the mission or reference path, a sweep of the DLL for that path from a start point to an end point is performed, and wherein the sweep end point is determined by detecting a transition on the captured data bit value.
19. The circuit of claim 18 , wherein a calibration timing delay value is chosen based on the sweep end point that is different from a delay value corresponding to that of the end point.
20. The circuit of claim 18 , wherein to detect a transition on the captured data bit value, the transition must be separated from a previously detected transition by at least a number of delay line increments equal to a predetermined jitter threshold value.