IP Library Granted Patent US 8,941,422
Granted Patent B2
US 8,941,422 · App. 14/205,225 · Granted Jan 27, 2015

Method for operating a data interface circuit where a calibration controller controls both a mission path and a reference path

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Quick Facts
Patent No.
US 8,941,422
App. No.
14/205,225
Granted
Jan 27, 2015
Kind
B2
Abstract

Circuits and methods for implementing a continuously adaptive timing calibration training function in an integrated circuit interface are disclosed. A mission data path is established where a data bit is sampled by a strobe. A similar reference data path is established for calibration purposes only. At an initialization time both paths are calibrated and a delta value between them is established. During operation of the mission path, the calibration path continuously performs calibration operations to determine if its optimal delay has changed by more than a threshold value. If so, the new delay setting for the reference path is used to change the delay setting for the mission path after adjustment by the delta value. Circuits and methods are also disclosed for performing multiple parallel calibrations for the reference path to speed up the training process.

Claims (55)

1. A method for operating a data interface circuit where a calibration controller controls both a mission path and a reference path that each capture a common data bit value, and wherein the mission path operates in conjunction with operation of a functional circuit, the method comprising:

performing a first calibration operation for both reference and mission paths to establish optimal delay settings for each path, and determining a delta value between the optimal delay settings for the reference and mission paths;

operating the data interface circuit including operation of the mission path to capture read data during a functional operation;

from time to time and without interfering with operation of the functional circuit and the mission path, performing an additional calibration of the reference path to determine a new optimal delay setting for the reference path;

if the new optimal delay setting for the reference data path differs from a previous delay setting by an amount greater than a change threshold value, setting the delay setting for the mission path to be equal to the new optimal delay setting for the reference path adjusted by the delta value;

wherein each of the reference and mission paths include at least one programmable DLL controlled by the calibration controller; and

wherein the mission path performs data capture solely for the functional circuit, and the reference path performs data capture solely for calibration purposes.

2. The method of claim 1 , wherein the common data bit value is programmably delayed for both mission and reference paths, and data bit delays for both paths are controlled by the calibration controller.

3. The method of claim 1 , wherein a capture strobe is programmably delayed for both mission and reference paths, and capture strobe delays for both paths are controlled by the calibration controller.

4. The method of claim 1 , further comprising:

performing a delay sweep for either path from a start point to an end point, wherein the end point of the sweep is determined by detecting a transition on the captured data bit value wherein the captured data bit value comprises the common data bit value.

5. The method of claim 4 , further comprising:

choosing a calibration timing delay value based on the sweep end point that is different from a delay value corresponding to that of the sweep end point.

6. The method of claim 4 , wherein to detect a transition on the captured data bit value, the transition must be separated from a previously detected transition by at least a number of delay line increments equal to a predetermined jitter threshold value.

7. A method for operating a data interface circuit wherein a calibration controller controls:

a mission path that captures and delays a data bit value in conjunction with operation of a functional circuit; and

a reference path that captures and delays the data bit value, the method comprising:

performing a first calibration operation for both reference and mission paths to establish an optimal delay setting for each path, and determining a delta value between the optimal delay settings for the reference and mission paths;

operating the data interface circuit including operation of the mission path to capture read data during operation of the functional circuit;

from time to time, and without interfering with operation of the functional circuit and the mission path, performing an additional calibration of the reference path to determine a new optimal delay setting for the reference path;

if the new optimal delay setting for the reference data path differs from a previous delay setting by an amount greater than a change threshold value, and without interrupting operation of the functional circuit, setting the delay setting for the mission path to be equal to the new optimal delay setting for the reference path adjusted by the delta value; and

wherein the mission path performs data capture solely for the functional circuit, and the reference path performs data capture solely for calibration purposes.

8. The method of claim 7 , further comprising:

performing a delay sweep of the data bit value from a start point to an end point, wherein the end point of the sweep is determined by detecting a transition on the captured data bit value.

9. The method of claim 8 , wherein to detect a transition on the captured data bit value, the transition must be separated from a previously detected transition by at least a number of delay increments equal to a predetermined jitter threshold value.

10. The method of claim 7 , further comprising:

from time to time, suspending operation of the functional circuit and performing a second calibration operation that is substantially equivalent to the first calibration operation; and

determining a new delta value between the optimal delay settings for the reference and mission paths.

11. A method for operating a data interface circuit wherein a calibration controller controls:

a mission path that captures a data bit value using a first delayed capture strobe, the mission path operating in conjunction with a functional circuit; and

a reference path that captures the data bit value using a second delayed capture strobe,

the method comprising:

performing a first calibration operation for both reference and mission paths to establish an optimal delay setting for each path, and determining a delta value between the optimal delay settings for the reference and mission paths;

operating the data interface circuit including operation of the mission path to capture read data during operation of the functional circuit;

from time to time, and without interfering with operation of the functional circuit and the mission path, performing an additional calibration of the reference path to determine a new optimal delay setting for the reference path;

if the new optimal delay setting for the reference data path differs from a previous delay setting by an amount greater than a change threshold value, and without interrupting operation of the functional circuit, setting the delay setting for the mission path to be equal to the new optimal delay setting for the reference path adjusted by the delta value; and

wherein the mission path performs data capture solely for the functional circuit, and the reference path performs data capture solely for calibration purposes.

12. The method of claim 11 , further comprising:

performing a delay sweep of the first or second capture strobe from a start point to an end point, wherein the end point of the sweep is determined by detecting a transition on the captured data bit value.

13. The method of claim 12 , wherein to detect a transition on the captured data bit value, the transition must be separated from a previously detected transition by at least a number of delay increments equal to a predetermined jitter threshold value.

14. The method of claim 11 , further comprising:

from time to time, suspending operation of the functional circuit and performing a second calibration operation that is substantially equivalent to the first calibration operation; and

determining a new delta value between the optimal delay settings for the reference and mission paths.

15. A method for operating a data interface circuit where a calibration controller controls both a mission path and a reference path that each capture a common data bit value in conjunction with operation of a functional circuit, the method comprising:

performing a first calibration for both reference and mission paths to initially establish optimal initial delay settings for each path, and determining a delta value between the optimal delay settings of the reference and mission paths;

operating the functional circuit including operation of the mission path;

from time to time during operation of the functional circuit, and without interfering with operation of the functional circuit or the mission path, performing an additional calibration operation for the reference path to determine a new optimal delay setting; and

wherein if a new optimal delay setting for the reference data path differs from a previous optimal delay setting for the reference path by an amount greater than a change threshold value, setting the delay setting for the mission path to a value that is equal to the new optimal delay setting for the reference path adjusted by the delta value.

16. The method of claim 15 , further comprising:

programmably delaying the common data bit for each of the mission and reference paths, wherein data bit delays for both mission and reference paths are controlled by the calibration controller.

17. The method of claim 15 , further comprising:

programmably delaying a capture strobe for each of the mission and reference paths, wherein capture strobe delays for both mission and reference paths are controlled by the calibration controller.

18. The method of claim 15 , wherein during a calibration operation of either the mission or reference path, a delay sweep for that path from a start point to an end point is performed, and wherein the sweep end point is determined by detecting a transition on the captured data bit value.

19. The method of claim 18 , wherein a calibration timing delay value is chosen based on the sweep end point that is different from a delay value corresponding to that of the end point.

20. The method of claim 18 , wherein to detect a transition on the captured common data bit value, the transition must be separated from a previously detected transition by at least a number of delay line increments equal to a predetermined jitter threshold value.

Assignments (14)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2026
From: GALLAGHER IP SOLUTIONS LLC
To: UNIQUIFY IP HOLDINGS, LLC
Reel/Frame 073762/0305 →
SECURITY INTEREST Recorded Aug 6, 2024
From: NEWLIGHT CAPITAL, LLC
To: GALLAGHER IP SOLUTIONS LLC
Reel/Frame 068201/0194 →
SECURITY INTEREST Recorded Aug 29, 2023
From: UNIQUIFY, INC.
To: NEWLIGHT CAPITAL LLC, AS SERVICER
Reel/Frame 064740/0469 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME PREVIOUSLY RECORDED AT REEL: 032984 FRAME: 0643. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jul 7, 2021
From: IYER, VENKAT; LEE, JUNG; JOSHI, PRASHANT
To: UNIQUIFY, INC.
Reel/Frame 056784/0479 →
CERTIFICATE OF MERGER Recorded Jun 30, 2021
From: UNIQUIFY IP COMPANY, LLC
To: UNIQUIFY, INC.
Reel/Frame 057326/0887 →
MERGER Recorded Jun 30, 2021
From: UNIQUIFY IP COMPANY, LLC
To: UNIQUIFY, INC.
Reel/Frame 056725/0939 →
SHORT FORM INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jun 30, 2021
From: UNIQUIFY, INC.
To: NEWLIGHT CAPITAL LLC, AS SERVICER
Reel/Frame 056728/0317 →
SHORT FORM INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jun 30, 2021
From: UNIQUIFY, INC.
To: NEWLIGHT CAPITAL LLC, AS SERVICER
Reel/Frame 056729/0519 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INVENTOR'S EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 046813 FRAME: 0080. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT . Recorded Jan 30, 2019
From: UNIQUIFY INC
To: UNIQUIFY IP COMPANY, LLC
Reel/Frame 048193/0693 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2019
From: UNIQUIFY, INC.
To: UNIQUIFY IP COMPANY, LLC
Reel/Frame 048143/0427 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2018
From: UNIQUIFY, INC.
To: UNIQUIFY IP COMPANY, LLC
Reel/Frame 046813/0080 →
RELEASE OF SECURITY INTEREST Recorded Oct 23, 2017
From: MONTAGE CAPITAL II, L.P.
To: UNIQUIFY, INC.
Reel/Frame 043927/0747 →
SECURITY INTEREST Recorded Oct 5, 2014
From: UNIQUIFY, INC.
To: MONTAGE CAPITAL II, L.P.
Reel/Frame 033887/0923 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2014
From: IYER, VENKAT; LEE, JUNG; JOSHI, PRASHANT
To: UNIQUIFY, INCORPORATED
Reel/Frame 032984/0643 →