Electrode configurations for semiconductor devices
A III-N semiconductor device can include an electrode-defining layer having a thickness on a surface of a III-N material structure. The electrode-defining layer has a recess with a sidewall, the sidewall comprising a plurality of steps. A portion of the recess distal from the III-N material structure has a first width, and a portion of the recess proximal to the III-N material structure has a second width, the first width being larger than the second width. An electrode is in the recess, the electrode including an extending portion over the sidewall of the recess. A portion of the electrode-defining layer is between the extending portion and the III-N material structure. The sidewall forms an effective angle of about 40 degrees or less relative to the surface of the III-N material structure.
1. A III-N semiconductor device, comprising:
an electrode-defining layer having a thickness on a surface of a III-N material structure, the electrode-defining layer having a recess with a sidewall, the sidewall comprising a plurality of steps, wherein a portion of the recess distal from the III-N material structure has a first width, and a portion of the recess proximal to the III-N material structure has a second width, the first width being larger than the second width; and
an electrode in the recess, the electrode including an extending portion over the sidewall, a portion of the electrode-defining layer being between the extending portion and the III-N material structure; wherein
at least one of the steps in the sidewall has a first surface that is substantially parallel to the surface of the III-N material structure and a second surface that is slanted; and
the sidewall forms an effective angle of about 40 degrees or less relative to the surface of the III-N material structure.
2. The device of claim 1 , wherein the III-N material structure comprises a first III-N material layer, a second III-N material layer, and a 2DEG channel induced in the first III-N material layer adjacent to the second III-N material layer as a result of a compositional difference between the first III-N material layer and the second III-N material layer.
3. The device of claim 2 , wherein the first III-N material layer includes GaN.
4. The device of claim 3 , wherein the second III-N material layer includes AlGaN or AlInGaN.
5. The device of claim 2 , further including a third III-N material layer between the first III-N material layer and the second III-N material layer.
6. The device of claim 5 , wherein the third III-N material layer comprises AlN.
7. The device of claim 2 , wherein the first III-N material layer and the second III-N material layer are group-III terminated semipolar layers, and the second III-N material layer is between the first III-N material layer and the electrode-defining layer.
8. The device of claim 2 , wherein the first III-N material layer and the second III-N material layer are N-face or [0 0 0 1bar] oriented or nitrogen-terminated semipolar layers, and the first III-N material layer is between the second III-N material layer and the electrode-defining layer.
9. The device of claim 2 , wherein the recess extends through the entire thickness of the electrode-defining layer.
10. The device of claim 9 , wherein the recess extends into the III-N material structure.
11. The device of claim 10 , wherein the recess extends through the 2DEG channel.
12. The device of claim 10 , wherein the recess extends at least 30 nanometers into the III-N material structure.
13. The device of claim 1 , wherein the second surface forms an angle of between 5 and 85 degrees with the surface of the III-N material structure.
14. The device of claim 1 , wherein the recess extends partially through the thickness of the electrode-defining layer.
15. The device of claim 1 , wherein the electrode-defining layer has a composition that is substantially uniform throughout.
16. The device of claim 1 , wherein the electrode-defining layer comprises SiN x .
17. The device of claim 1 , wherein a thickness of the electrode-defining layer is between about 0.1 microns and 5 microns.
18. The device of claim 1 , further comprising a dielectric passivation layer between the III-N material structure and the electrode-defining layer, the dielectric passivation layer directly contacting a surface of the III-N material adjacent to the electrode.
19. The device of claim 18 , wherein the dielectric passivation layer comprises SiN x .
20. The device of claim 18 , wherein the dielectric passivation layer is between the electrode and the III-N material structure, such that the electrode does not directly contact the III-N material structure.
21. The device of claim 18 , further comprising an additional insulating layer between the dielectric passivation layer and the electrode-defining layer.
22. The device of claim 21 , wherein the additional insulating layer comprises AlN.
23. The device of claim 21 , wherein the additional insulating layer is less than about 20 nanometers thick.
24. The device of claim 1 , wherein the extending portion of the electrode functions as a field plate.
25. The device of claim 1 , wherein the electrode is an anode, and the device is a diode.
26. The device of claim 1 , wherein the electrode is a gate, and the device is a transistor.
27. The device of claim 26 , wherein the device is an enhancement-mode device.
28. The device of claim 26 , wherein the device is a depletion-mode device.
29. The device of claim 1 , wherein the device is a high-voltage device.
30. The device of claim 1 , wherein the effective angle is about 20 degrees or less, and a breakdown voltage of the device is about 100V or larger.
31. The device of claim 1 , wherein the effective angle is about 10 degrees or less, and a breakdown voltage of the device is about 300V or larger.
32. The device of claim 1 , wherein at least one of the steps has a first surface that is substantially parallel to the surface of the III-N material structure and a second surface that is substantially perpendicular to the surface of the III-N material structure.
33. The device of claim 1 , wherein the extending portion directly contacts the sidewall.
34. A III-N semiconductor device, comprising:
an electrode-defining layer having a thickness on a surface of a III-N material structure, the electrode-defining layer having a recess with a sidewall, the sidewall comprising a plurality of steps, wherein a portion of the recess distal from the III-N material structure has a first width, and a portion of the recess proximal to the III-N material structure has a second width, the first width being larger than the second width; and
an electrode in the recess, the electrode including an extending portion over the sidewall, a portion of the electrode-defining layer being between the extending portion and the III-N material structure; wherein
at least one of the steps in the sidewall has a first surface that is substantially parallel to the surface of the III-N material structure and a second surface that is slanted, the second surface forming an angle of between 5 and 85 degrees with the surface of the III-N material structure.
35. The device of claim 34 , wherein the III-N material structure comprises a first III-N material layer and a second III-N material layer, wherein a 2DEG channel is induced in the first III-N material layer adjacent to the second III-N material layer as a result of a compositional difference between the first III-N material layer and the second III-N material layer.
36. The device of claim 35 , wherein the first III-N material layer includes GaN.
37. The device of claim 36 , wherein the second III-N material layer includes AlGaN or AlInGaN.
38. The device of claim 35 , wherein the first III-N material layer and the second III-N material layer are N-face or [0 0 0 1bar] oriented or nitrogen-terminated semipolar layers, and the first III-N material layer is between the second III-N material layer and the electrode-defining layer.
39. The device of claim 35 , wherein the recess extends through the entire thickness of the electrode-defining layer.
40. The device of claim 39 , wherein the recess extends into the III-N material structure.
41. The device of claim 34 , wherein the recess extends partially through the thickness of the electrode-defining layer.
42. The device of claim 34 , further comprising a dielectric passivation layer between the III-N material structure and the electrode-defining layer, the dielectric passivation layer directly contacting a surface of the III-N material adjacent to the electrode.
43. The device of claim 42 , wherein the dielectric passivation layer is between the electrode and the III-N material structure, such that the electrode does not directly contact the III-N material structure.
44. The device of claim 43 , further comprising an additional insulating layer between the dielectric passivation layer and the electrode-defining layer.
45. The device of claim 44 , wherein the additional insulating layer comprises AlN.