IP Library Granted Patent US 9,406,647
Granted Patent B2
US 9,406,647 · App. 14/214,120 · Granted Aug 2, 2016

Extended redistribution layers bumped wafer

Inventors: Byung Tai Do (Singapore, SG); Heap Hoe Kuan (Singapore, SG)
Assignee: STATS ChipPAC Pte. Ltd.
H01L24/97H01L21/568H01L21/6835H01L21/6836H01L24/11H01L24/14H01L24/96H01L23/3114H01L23/3185H01L23/498H01L2221/68327H01L2221/68359H01L2224/0401H01L2224/04105H01L2224/13099H01L2224/20H01L2924/01002H01L2924/014H01L2924/01005H01L2924/01006H01L2924/01013H01L2924/01015H01L2924/01022H01L2924/01029H01L2924/01033H01L2924/01047H01L2924/01074H01L2924/01075H01L2924/01078H01L2924/01079H01L2924/09701H01L2924/12042H01L2924/14H01L2924/15173H01L2924/15311H01L2924/15787H01L2924/30105
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Quick Facts
Patent No.
US 9,406,647
App. No.
14/214,120
Granted
Aug 2, 2016
Kind
B2
Abstract

A semiconductor device is manufactured by, first, providing a wafer, designated with a saw street guide, and having a bond pad formed on an active surface of the wafer. The wafer is taped with a dicing tape. The wafer is singulated along the saw street guide into a plurality of dies having a plurality of gaps between each of the plurality of dies. The dicing tape is stretched to expand the plurality of gaps to a predetermined distance. An organic material is deposited into each of the plurality of gaps. A top surface of the organic material is substantially coplanar with a top surface of a first die of the plurality of dies. A redistribution layer is patterned over a portion of the organic material. An under bump metallization (UBM) is deposited over the organic material in electrical communication, through the redistribution layer, with the bond pad.

Claims (33)

1. A method of making a semiconductor device, comprising:

providing a plurality of semiconductor die with a space separating adjacent semiconductor die;

depositing an insulating layer in the space separating the semiconductor die;

forming a conductive layer over the insulating layer and semiconductor die;

forming an under bump metallization (UBM) over the insulating layer and semiconductor die; and

forming a plurality of bumps interconnect structures over the UBM, insulating layer, and semiconductor die.

2. The method of claim 1 , further including forming the space separating the semiconductor die by:

disposing the semiconductor die over a tape; and

stretching the tape.

3. The method of claim 1 , further including forming the space separating the semiconductor die by disposing the semiconductor die over a substrate with a physical separation between adjacent semiconductor die.

4. The method of claim 1 , further including cutting through the insulating layer after forming the bumps to singulate the semiconductor die.

5. The method of claim 1 , wherein the UBM includes a non-refractory metal and a binary metal alloy.

6. The method of claim 1 , further including forming a surface of the insulating layer substantially coplanar with a surface of the semiconductor die.

7. A method of making a semiconductor device, comprising:

providing a plurality of semiconductor die separated by a space;

depositing an insulating layer in the space separating the semiconductor die;

forming a conductive layer over the insulating layer and semiconductor die; and

forming a plurality of bumps over the insulating layer and semiconductor die.

8. The method of claim 7 , further including forming an under bump metallization (UBM) over the insulating layer and semiconductor die.

9. The method of claim 8 , further including forming the bumps over the UBM.

10. The method of claim 8 , wherein the UBM includes a refractory metal.

11. The method of claim 7 , further including disposing the semiconductor die over a dicing tape.

12. The method of claim 7 , further including disposing the semiconductor die over a substrate.

13. The method of claim 12 , wherein the substrate includes glass, ceramic, laminate, or silicon.

14. A method of making a semiconductor device, comprising:

providing a plurality of semiconductor die separated by a space;

depositing an insulating material in the space separating the semiconductor die;

forming a conductive layer over the insulating material and semiconductor die; and

forming a plurality of interconnect structures over the insulating material and semiconductor die.

15. The method of claim 14 , further including forming an under bump metallization over the insulating material.

16. The method of claim 14 , further including cutting through the insulating material after forming the interconnect structures.

17. The method of claim 14 , further including disposing the semiconductor die over a substrate.

18. The method of claim 17 , further including stretching the substrate to increase a distance between the semiconductor die.

Assignments (4)
THIS SUBMISSION IS TO CORRECT A TYPOGRAPHICAL ERROR IN THE COVER SHEET PREVIOUSLY RECORDED ON REEL: 038378 FRAME: 0382 TO CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE." TO "STATS CHIPPAC PTE. LTD." Recorded Sep 6, 2023
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 064869/0363 →
RELEASE OF SECURITY INTEREST Recorded Jun 16, 2020
From: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
To: STATS CHIPPAC, INC.; STATS CHIPPAC PTE. LTD. FORMERLY KNOWN AS STATS CHIPPAC LTD.
Reel/Frame 052963/0546 →
CHANGE OF NAME Recorded Apr 7, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTE.
Reel/Frame 038378/0382 →
SECURITY INTEREST Recorded Aug 6, 2015
From: STATS CHIPPAC, INC.; STATS CHIPPAC LTD.
To: CITICORP INTERNATIONAL LIMITED, AS COMMON SECURITY AGENT
Reel/Frame 036288/0748 →
Continuity (3)
Continuation 12704345 · Feb 11, 2010
Division 11744743 · May 4, 2007
Related Publication 20140197540A1 · Jul 17, 2014