Diffusion-controlled semiconductor contact creation

1. A method of forming a contact, the method comprising:

forming a layer of dielectric material on a silicon-containing region of a semiconductor substrate;

creating an opening through the layer of dielectric material, the opening having a bottom and exposing the silicon-containing region;

forming a metal stack within the opening, the metal stack including at least a first metal film that includes a first type of metal and a second type of metal and a second metal film;

annealing the metal stack and the silicon-containing region of the semiconductor substrate to form a silicide that includes the first and second types of metal and that is in contact with the semiconductor substrate;

forming a first liner within the opening subsequent to forming the metal stack within the opening, wherein the first liner is in direct contact with sidewalls of the layer of dielectric material; and

depositing a fill metal in the opening.

2. The method of claim 1 , wherein the first type of metal is selected from the group consisting of titanium, tantalum, cobalt, ruthenium, rhenium, nickel, platinum, hafnium, tungsten, and alloys thereof.

3. The method of claim 2 , wherein the second type of metal is selected from the group consisting of aluminum, platinum, iridium, ytterbium, and erbium.

4. The method of claim 1 , wherein the annealing is performed by using a millisecond laser anneal that reaches a first temperature between 600° C. and 1100° C. for between 0.1ms and 2ms.

5. The method of claim 1 , wherein the fill metal is selected from the group consisting of tungsten, cobalt, nickel, titanium, tantalum, copper, silver, and alloys thereof.

6. The method of claim 1 , wherein the first metal film is at least 1nm in thickness and no more than 8nm in thickness.

7. The method of claim 1 , wherein the second metal film is at least 1nm in thickness and no more than 8nm in thickness.

8. The method of claim 1 , wherein the first metal film is about 4nm in thickness and the second metal film is about 4nm in thickness.

9. The method of claim 1 , wherein the first metal film is about 50% the first type of metal and about 50% the second type of metal; and the second metal film contains predominantly the first type of metal.

10. The method of claim 9 , wherein

the first type of metal is titanium;

the second type of metal is aluminum; and

the annealing forms a titanium-aluminum silicide in contact with the semiconductor substrate.

11. The method of claim 1 , further comprising cleaning the opening and a top of the metal stack with a selective etch.

12. The method of claim 11 , further comprising performing a chemical mechanical polish step subsequent to depositing the fill metal in the opening.

13. The method of claim 12 , further comprising forming a silicon dioxide layer on the semiconductor substrate subsequent to creating the opening.

14. The method of claim 13 , further comprising:

removing the first liner and the metal fill;

forming a second liner within the opening;

depositing another fill metal in the opening subsequent to forming the second liner.

15. The method of claim 14 , wherein the second liner is in direct contact with sidewalls of the layer of dielectric material.

16. The method of claim 15 , wherein the metal stack includes a silicide layer in between the first metal film and the second metal film.

17. The method of claim 16 , wherein the second liner is formed directly in contact with the second metal film.

18. The method of claim 17 , wherein the first metal film and the second metal film extend within the opening to touch the sidewalls along a perimeter of the opening.